Electric lamp and discharge devices: systems – Plural power supplies – Plural cathode and/or anode load device
Reexamination Certificate
2002-05-23
2003-12-30
Nguyen, Hoang V. (Department: 2821)
Electric lamp and discharge devices: systems
Plural power supplies
Plural cathode and/or anode load device
C315S169300
Reexamination Certificate
active
06670775
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a plasma display panel (PDP) and a driving method of the PDP, in particular, which is operated by an alternating current (AC).
DESCRIPTION OF THE RELATED ART
A PDP, a liquid crystal display (LCD), and an electro-luminescence display (ELD) are used as a flat display panel. The PDP has been used for a work station and a wall television set, as a display whose screen size can be made to be large. Recently, a PDP whose screen size is large, for example, a 40 inch-type or a 50 inch-type PDP has been realized. However, it is very difficult that a cathode ray tube (CRT) technology realizes this size of screen.
It is expected that the CRT display will be replaced by the PDP in the future, however, its cost is higher and also its power consumption is larger than those of the CRT display.
The PDP provides plural display cells arrayed in a matrix state. There are two light emitting systems at the PDP, that is, one is a direct current driving type (DC type) and the other is an alternating current driving type (AC type). At the DC type, electrodes are exposed in a discharge space filled with a discharge gas, and DC voltages are applied to the electrodes. At the AC type, the electrodes are covered with a dielectric layer and are not directly exposed in the discharge gas, and AC voltages are applied to the electrodes. Further, the AC type is classified into two types, that is, one type is a memory utilizing type that utilizes a memory function of the dielectric layer which stores electric charges, and the other type is a refreshing type that does not utilizes the memory function.
A conventional PDP provides a front substrate and a rear substrate facing the front substrate, and a designated interval exists between the front substrate and the rear substrate. Plural scanning electrodes and plural common electrodes are disposed in parallel in the row direction on the front substrate. Plural data electrodes are disposed in the column direction on the rear substrate.
The display cells (pixels), which are formed at points where the data electrodes cross the scanning electrodes and the common electrodes, emit light by making discharges generate by that a designated voltage is applied to each of the electrodes under designated conditions. The scanning electrodes and the common electrodes are covered with a first dielectric layer on whose surface a protection layer is formed, and the data electrodes are covered with a second dielectric layer on whose surface a designated fluorescent material is coated. With this structure, an image is displayed on the PDP.
FIG. 1
is a timing chart of driving voltage waveforms in one sub field (SF) at a driving method of a conventional memory utilizing type AC-PDP. As shown in
FIG. 1
, the
1
SF consists of a priming discharge period, a scanning period, and a sustaining period. At the priming discharge period, erasing pulses
21
, priming discharge pulses
22
, and priming discharge erasing pulses
23
are applied. At the scanning period, scanning pulses
24
, and data pulses
27
are applied. And at the sustaining period, sustaining pulses
25
and
26
are applied.
In
FIG. 1
, the conventional memory utilizing type AC-PDP provides “m” scanning electrodes S
i
(i=1, 2, . . . , m), “m” common electrodes C
i
(i=1, 2, . . . , m), and “n” data electrodes D
j
(j=1, 2, . . . , n), and each of the “m” scanning electrodes S
i
becomes a pair with each of the “m” common electrodes C
i
. And each of the display cells is formed at a point where each of the data electrodes D
j
crosses each of the scanning electrodes S
i
and each of the common electrodes C
i
.
First, at the priming discharge period, the erasing pulses
21
are applied to all of the scanning electrodes
12
, and discharging is generated at display cells in discharge ON state, which have emitted light during the previous sustaining period, and all of the display cells are made to be an erasing state (discharge OFF state). This operation by the erasing pulses
21
is called as sustaining discharge erasing operation. In this, the erasing signifies that wall charges are decreased or made to be zero. The wall charges are explained in detail later.
Next, the priming discharge pulses
22
are applied to all of the common electrodes
13
, and discharging is generated at all of the display cells by compulsion. And the priming discharge erasing pulses
23
are applied to all of the scanning electrodes
12
, and all of the display cells are made to be an erasing state. In this, discharging operation by the priming discharge pulses
22
is called as priming discharge operation, and discharging operation by the priming discharge erasing pulses
23
is called as priming discharge erasing operation. These priming discharge operation and priming discharge erasing operation make the occurrence of the following writing discharge easy.
After the priming discharge erasing operation, in the scanning period, a scanning pulse
24
is applied to the scanning electrodes S
1
to S
m
in sequence by shifting the applying timing of the scanning pulse
24
. And the data pulses
27
corresponding to display information are applied to the data electrodes D
1
to D
n
respectively, by matching with the timing applying the scanning pulse
24
. The oblique line attached to the data pulses
27
shows that the presence/absence of data pulses
27
is determined in accordance with presence/absence of the display information data. When the scanning pulse
24
was applied, discharging is generated only at display cells corresponding to the data electrodes
19
, to which the data pulses
27
were applied. This discharge is called as the writing discharge, because the display information is written in the display cells when the discharge is generated.
At the display cell where the writing discharge was generated, a positive electric charge called a wall charge is stored in the dielectric layer on the scanning electrode
12
, and a negative wall charge is stored in the dielectric layer on the data electrode
19
.
In the sustaining period, the first discharge is generated at the display cell, by adding the first sustaining pulse
25
being negative polarity applied to the common electrode
13
to the positive wall charge in the dielectric layer on the scanning electrode
12
. When the first discharge was generated, a positive wall charge is stored in the dielectric layer on the common electrode
13
, and a negative wall charge is stored in the dielectric layer on the scanning electrode
12
. And the second discharge is generated, by adding the second sustaining pulse
26
applied to the scanning electrode
12
to the potential difference between positive and negative wall charges. As mentioned above, the discharge is sustained by adding the (n+1)th sustaining pulse to the potential difference of the wall charges formed by “n”th discharge (n is an integer), therefore, this discharge is called as a sustaining discharge. The light emitting luminance is controlled by the number of continuing times of the sustaining discharges.
The sustaining pulse
25
to be applied to the common electrode
13
and the sustaining pulse
26
to be applied to the scanning electrode
12
are adjusted to be low voltages so that the discharge is not generated by only applying the sustaining pulses
25
and
26
. With this, at a display cell, in which a writing discharge was not generated, electric potential by wall charges does not exist before the first sustaining pulse
25
is applied. Therefore, even when the first sustaining pulse
25
is applied, the first sustaining discharge is not generated at the display cell, and the sustaining discharge is not generated after this.
FIG. 2
is a timing chart of driving voltage waveforms in one SF at a conventional AC-PDP described in Japanese Patent No. 2503860. At the driving voltage waveforms shown in
FIG. 2
, a sub scanning pulse
28
being negative polarity is applied to all of the common electrodes
13
in the scanning period. Driving pulses i
McGinn & Gibb PLLC
Nguyen Hoang V.
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