Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1999-05-03
2003-04-15
Hjerpe, Richard (Department: 2674)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S055000, C345S061000, C345S062000, C345S067000, C345S056000, C345S072000, C315S169400, C315S169300, C313S586000, C313S582000, C313S587000
Reexamination Certificate
active
06549180
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a plasma display panel used for a flat display device, and more particularly to a plasma display panel that is adapted to shorten an addressing time and a driving method thereof.
2. Description of the Related Art
The conventional alternating current plasma display panel has cells arranged in a matrix pattern. As shown in
FIGS. 1A and 1B
, the cells of the plasma display panel(PDP) includes an upper glass substrate
10
and a lower glass substrate
12
which are spaced, in parallel, with a barrier rib
14
. The barrier rib
14
provides a discharge space isolated between the upper glass substrate
10
and the lower glass substrate
12
. On the bottom surface of the upper glass substrate
10
is installed a sustaining electrode pair
16
which consists of a scanning/sustaining electrode
16
A, hereinafter referred to as “Y sustaining electrode”, and a sustaining electrode
16
B, hereinafter referred to as “Z sustaining-electrode”. An upper dielectric layer
18
and a protective film
20
is sequentially formed on the bottom surface of the upper glass substrate
10
under which the sustaining electrode pair
16
is installed. The upper dielectric layer
18
accumulates electric charges, and the protective film
20
protects the upper dielectric layer
18
from a sputtering of plasma particles. The protective film
20
permits a life of the upper dielectric layer
18
to be prolonged, an emission efficiency of secondary electrons to be enhanced, and a change in a discharge characteristic due to an oxide contamination of a refractory metal to be restrained. To this end, the protective film
20
is mainly made from MgO. Meanwhile, the lower glass substrate
12
has an address electrode
22
provided on the surface thereof. On the lower glass substrate
12
provided with the address electrode
22
is coated a lower dielectric layer
24
for accumulating electric charges and a fluorescent layer
26
for emitting visible rays with intrinsic colors. The fluorescent layer
26
is coated on the lower glass substrate
12
in such a manner to be extended into a wall surface of the barrier rib
14
. The fluorescent layer
26
is excited and transited by an ultraviolet with a short wavelength generated during the gas discharge to thereby emit red(R), green(G), and blue(B) visible lights. A mixture gas of Ne and Xe is filled in the discharge space provided by the barrier rib
14
so as to enhance the generation efficiency of an ultraviolet.
As shown in
FIG. 2
, an alternating current PDP having the cells with the structure as described above includes electrode lines arranged in a matrix pattern. In the alternating current(AC) PDP of
FIG. 2
, the Y sustaining electrode lines
16
A and the Z sustaining electrode lines
16
B is alternately arranged in the vertical direction. The Y and Z sustaining electrodes
16
A and
16
B are crossed with address electrode lines
22
arranged, in parallel, in the horizontal direction. For instance, to construct the conventional VGA-class color PDP with 640×480 pixels requires
480
Y and Z sustaining electrode line pairs(i.e., Y
1
to Y
480
and Z
1
to Z
480
) and
1920
address electrode lines (i.e., X
1
to X
1920
). To require
1920
in the number of address electrode lines is caused by a fact that a single pixel consists of red, green and blue color pixel. Each of the Y and Z sustaining electrode line pairs
16
A and
16
B making row lines allows the cells to be scanned in the line unit and, at the same time, the discharge to be kept continuously. The address electrode lines
22
making column lines are used to write a data into each cell of the PDP.
The AC PDP with such an electrode structure is driven in a sub-field system as shown in
FIG. 3
so as to display a gray level of color picture. As shown in
FIG. 3
, a PDP driving method of sub-field system divides a frame interval for displaying a single picture into a plurality of sub-fields, for example, 8 sub-fields SF
1
to SF
8
. Each of the plurality of sub-fields has a radiation interval increasing gradually in such a manner to have a brightness value of 2
0,
2
1,
2
2, . . .
2
X−2,
2
X−1
. The gray level of a color picture is implemented by a combination of such sub-fields. For instance, when a single frame interval is divided into 8 sub-fields as shown in
FIG. 3
, the gray level from 0 to 256 is implemented. Each sub-field is divided into an address interval for selecting cells causing the discharge in the cells of the PDP and a sustaining interval for causing the radiation at each cell of the PDP. The address interval has a constant time width independently of the sub-fields while the sustaining interval has a different time width depending on the sub-fields. A wall charge is formed at the side of Y sustaining electrode in the address interval at each cell of the PDP to be discharged in the sustaining interval. In order to form a wall charge selectively at the cells of the PDP in this manner, the sustaining electrode lines Y
1
to Y
480
must sequentially be selected and, at the same time, the address electrodes X
1
to X
1920
is supplied with a data each time the sustaining electrode lines Y
1
to Y
480
are selected. More specifically, if a low voltage of scanning pulse is applied to the first sustaining electrode line Y
1
and, simultaneously, a data pulse is applied to the address electrode lines X
1
to X
1920
, then a discharge is selectively generated from cells positioned at an intersection of the first Y sustaining electrode line Y
1
and the address electrode lines X
1
to X
1920
. At this time, a discharge is generated only from the cells connected to the address electrode lines X applied with a high level of data pulse in the address electrode lines X
1
to X
1920
and, simultaneously, a wall charge is formed at the side of first Y sustaining electrode Y
1
only at the cells as mentioned above. In the similar manner, a discharge is selectively generated by applying a low voltage of sustaining pulse to the second Y sustaining electrode line Y
2
to the last Y sustaining electrode Y
480
sequentially and, at the same time, applying a data pulse to the address electrode lines X
1
to X
1920
repeatedly. When such an address operation has been completed, a sustaining discharge is generated only from the cells formed with a wall charge by applying a sustaining voltage to each of the Y and Z sustaining electrode lines Y
1
to Y
480
and Z
1
to Z
480
simultaneously.
As described above, the conventional PDP driving method must sequentially select the Y sustaining electrode lines Y
1
to Y
480
every sub-field so as to select cells to be discharged. Due to this, the conventional PDP driving method can not help avoiding a long address interval. Also, the quantity of wall charges formed at the cells provided on the first row line in the course of the address interval becomes smaller than that formed at the cells provided on the last row lines. Due to this wall charge difference, a sustaining discharge appears non-uniformly on the panel. Such a non-uniformity in the sustaining discharge becomes more and more serious as the PDP has a tendency to a high picture quality. In view of this, it is required to provide a scheme capable of reducing the address interval.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a PDP that is adapted to shorten an address interval.
Further object of the present invention is to provide a PDP driving method that is suitable for shortening an address interval.
In order to achieve these and other objects of the invention, a plasma display panel according to one aspect of the present invention includes first and second sustaining electrode lines making each row line; and first and second address electrode lines making each column line. The plasma display panel further includes insulating material patterns formed in such a manner to be alternately superposed on the first and second address electrode lines as the row lines are p
Jeon Woo Gon
Yoo Eun Ho
Fleshner & Kim LLP
LG Electronics Inc.
Zamani Ali
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