Plasma display panel

Electric lamp and discharge devices – With gas or vapor – Three or more electrode discharge device

Reexamination Certificate

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Details

C313S584000, C313S586000

Reexamination Certificate

active

06650051

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a plasma display panel having an improved structure of a black matrix layer formed on a front substrate.
2. Description of the Related Art
In a plasma display panel, discharge gas filled between a pair of substrates opposing one another is discharged and ultraviolet rays generated during the discharge become excited to form an image.
The plasma display panel is classified into a DC type and an AC type depending on the type of discharge and an opposing discharge type and a surface discharge type depending on the arrangement of electrodes.
FIG. 1
is a view showing an example of a conventional plasma display panel. Referring to the drawing, a plurality of common electrodes
12
a
and scanning electrodes
12
b
are alternately formed in strips on the lower surface of a front substrate
11
a
. The electrodes
12
a
and
12
b
can be respectively provided with bus electrodes
13
a
and
13
b
, each having a narrower width than that of the electrodes
12
a
and
12
b
to reduce line resistance. The common and scanning electrodes
12
a
and
12
b
and the bus electrodes
13
a
and
13
b
are embedded in a dielectric layer
14
coated on the lower surface of the front substrate
11
a
. A protective film
15
such as a magnesium oxide (MgO) film can be formed on the lower surface of the dielectric layer
14
.
A maintenance discharge is generated between the common and scanning electrodes
12
a
and
12
b
. A pair of the common and scanning electrodes
12
a
and
12
b
constitute one discharge cell. An insulation layer
1
is formed between adjacent discharge cells. Also, a conductive layer
2
is respectively formed between the common electrode
12
a
and the bus electrode
13
a
, and the scanning electrode
12
b
and the bus electrode
13
b
. The insulation layer
1
and the conductive layer
2
are generally black.
An address electrode
16
is formed in strips to cross both electrodes
12
a
and
12
b
on the upper surface of a rear substrate
11
b
which is installed to be opposite the front substrate
11
a
. The address electrode
16
is embedded in a dielectric layer
17
coated on the front substrate
11
a
. A plurality of partitions
18
defining a discharge space are formed on the dielectric layer
17
spaced apart from one another. A fluorescent layer
19
is coated on a surface inside the discharge space.
In the conventional plasma display panel having the above structure, when voltage is applied to the scanning electrode
12
b
and the address electrode
16
, a preliminary discharge is generated and wall charges are filled in the discharge space. When a voltage is applied between the common electrode
12
a
and the scanning electrode
12
b
, under the above circumstances, a maintenance discharge is generated and plasma is generated so that ultraviolet rays are emitted to excite the fluorescent layer
19
and an image is finally formed.
Here, the black insulation layer
1
and the conductive layer
2
reduce a color blurring phenomenon due to weak light emission in a non-discharging area, lower reflectance of the external light of the front substrate
11
a
, and block light emission due to a so-called background discharge so that contrast is improved.
The insulation layer
1
and the conductive layer
2
are formed of different materials by a print method using a screen where a pattern is formed. That is, the insulation layer
1
is formed of an insulative material which is a mixture of glass powder, lead oxide (PbO), aluminum oxide (Al
2
O
3
), and a black pigment, while the conductive layer
2
is formed of a conductive material which is a mixture of silver powder and an oxide. Consequently, each unit process of forming the insulation layer
1
and conductive layer
2
, particularly a photo step and a curing step, becomes relatively complicated so that the working efficiency is lowered.
SUMMARY OF THE INVENTION
To solve the above problems, it is an objective of the present invention to provide a plasma display panel having a simplified manufacturing process by integrally forming a black matrix layer with the same material at the boundary area between neighboring discharge cells and between the respective common and scanning electrodes and the bus electrode.
Accordingly, to achieve the above objective, there is provided a plasma display panel comprising: a front substrate; a scanning electrode and a common electrode which are alternately formed in strips and parallel to one another on a lower surface of the front substrate; a bus electrode formed on lower surfaces of the respective scanning and common electrodes to have a narrower width than that of each of the scanning and common electrodes; and a black matrix layer formed of the same insulative material to be parallel to the electrodes at a boundary area between neighboring discharge cells, each cell being constituted by a discharge space including a pair of the scanning electrode and the common electrode, and between the scanning and common electrodes and the bus electrode, on a lower surface of the front substrate.
It is preferred in the present invention that the black matrix layer formed between the scanning and common electrodes and the bus electrode is thinner than the black matrix layer formed at a boundary area of neighboring discharge cells.
Also, it is preferred in the present invention that the black matrix layer is integrally formed at a boundary area between neighboring discharge cells and between the scanning and common electrodes and the bus electrode.
Further, it is preferred in the present invention that the black matrix layer is formed of an insulation material in which glass powder is mixed with an oxide and a black pigment.


REFERENCES:
patent: 5952782 (1999-09-01), Nanto et al.
patent: 6034474 (2000-03-01), Ueoka et al.
patent: 6084349 (2000-07-01), Ueoka et al.
patent: 6140758 (2000-10-01), Matsuda et al.
patent: 6333597 (2001-12-01), Mitomo
patent: 9-129142 (1997-05-01), None

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