Electric lamp and discharge devices: systems – Plural power supplies – Plural cathode and/or anode load device
Reexamination Certificate
2002-07-17
2003-12-23
Philogene, Haissa (Department: 2821)
Electric lamp and discharge devices: systems
Plural power supplies
Plural cathode and/or anode load device
C315S069000, C313S584000, C313S581000, C345S067000
Reexamination Certificate
active
06667581
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a plasma display panel, and more particularly to a plasma display panel that is adaptive for improving light-emission efficiency.
2. Description of the Related Art
Generally, a plasma display panel (PDP) is a display device utilizing a visible light emitted from a fluorescent body when an ultraviolet ray generated by a gas discharge excites the fluorescent body. The PDP has an advantage in that it has a thinner thickness and a lighter weight in comparison to the existent cathode ray tube (CRT) and is capable of realizing a high resolution and a large-scale screen. The PDP includes of a plurality of discharge cells arranged in a matrix pattern, each of which makes one pixel of a field.
FIG. 1
is a perspective view showing a discharge cell structure of a conventional three-electrode, alternating current (AC) surface-discharge PDP.
Referring to
FIG. 1
, a discharge cell
1
of the conventional three-electrode, AC surface-discharge PDP includes a first electrode
12
Y and a second electrode
12
Z provided on an upper substrate
10
, and an address electrode
20
X provided on a lower substrate
18
. Such a discharge cell
1
is arranged at a panel in a matrix type as shown in FIG.
2
.
On the upper substrate
10
provided with the first electrode
12
Y and the second electrode
12
Z in parallel, an upper dielectric layer
14
and a protective film
16
are disposed. Wall charges generated upon plasma discharge are accumulated into the upper dielectric layer
14
. The protective film
16
prevents a damage of the upper dielectric layer
14
caused by a sputtering during the plasma discharge and improves the emission efficiency of secondary electrons. This protective film
16
is usually made from magnesium oxide (MgO).
A lower dielectric layer
22
and barrier ribs
24
are formed on the lower substrate
18
provided with the address electrode
20
X. The surfaces of the lower dielectric layer
22
and the barrier ribs
24
are coated with fluorescent layers
26
R,
26
G and
26
B. The address electrode
20
X is formed in a direction crossing the first electrode
12
Y and the second electrode
12
Z. The barrier rib
24
is formed in parallel to the address electrode
20
X to prevent an ultraviolet ray and a visible light generated by a discharge from being leaked to the adjacent discharge cells.
The fluorescent layers
26
R,
26
G and
26
B are excited by an ultraviolet ray generated during the plasma discharge to generate any one of red, green and blue visible light rays. An inactive gas for a gas discharge is injected into a discharge space defined between the upper and lower substrate
10
and
18
and the barrier rib
24
. A black matrix
30
is formed between the first electrode
12
Y and the second electrode
12
Z which are provided at the adjacent discharge cells
1
.
Such an AC surface-discharge PDP drives one frame, which is divided into various sub-fields having a different discharge frequency, so as to express gray levels of a picture. Each sub-field is again divided into an initialization period for uniformly causing a discharge, an address period for selecting the discharge cell and a sustain period for realizing the gray levels depending on the discharge frequency. For instance, when it is intended to display a picture of 256 gray levels, a frame interval equal to {fraction (1/60)} second (i.e. 16.67 msec) is divided into 8 sub-fields SF
1
to SF
8
as shown in FIG.
2
. Each of the 8 sub-fields SF
1
to SF
8
is divided into an address period and a sustain period. Herein, the initialization period and the address period of each sub-field are equal every sub-field, whereas the sustain period is increased at a ration of 2
n
(wherein n=0, 1, 2, 3, 4, 5, 6 and 7) at each sub-field. Since each sub-field has a different sustain period, it is able to express a gray scale of a picture.
In the reset period, a reset pulse is applied to the first electrode
12
Y to cause a reset discharge. In the address period, a scanning pulse is applied to the first electrode
12
Y and a data pulse is applied to the address electrode
20
X, to thereby cause an address discharge between two electrodes
12
Y and
20
X. Upon address discharge, wall charges are formed at upper and lower dielectric layers
14
and
22
. In the sustain period, an alternating current applied alternately to the first electrode
12
Y and the second electrode
12
Z generates a sustain discharge at the first electrode
12
Y and the second electrode
12
Z.
In such a conventional PDP, the red fluorescent layer
26
R, the green fluorescent layer
26
G and the blue fluorescent layer
26
B are formed from a different material to thereby have a different dielectric constant. Accordingly, in order to generate a uniform address discharge at discharge cells, a driving voltage applied to each discharge should be set differently in consideration of dielectric constants of the fluorescent layers
26
R,
26
G and
26
B.
However, in the conventional address period, all the discharge cells are supplied with a scanning pulse and a data pulse that have the same voltage level. Accordingly, dielectric constants of the red, green and blue fluorescent layers
26
R,
26
G and
26
B cause a different address discharge is at each discharge cell. In other words, in the prior art, a uniformity of the discharge cell may be deteriorated, and an erroneous discharge may be generated in the sustain period due to wall charges formed differently for each discharge.
In order to compensate for the above-mentioned disadvantage, Korean Laid-open Patent Gazette No. 98-49446 has suggested a PDP as shown in FIG.
3
.
Referring to
FIG. 3
, a three-electrode PDP according to another conventional embodiment includes a first electrode
34
Y and a second electrode
34
Z provided on an upper substrate
32
, and an address electrode
42
X provided on a lower substrate
40
.
On the upper substrate
32
provided with the first electrode
34
Y and the second electrode
34
Z in parallel, an upper dielectric layer
36
and a protective film
38
are disposed. Wall charges generated upon plasma discharge are accumulated into the upper dielectric layer
36
. The protective film
38
prevents a damage of the upper dielectric layer
36
caused by a sputtering during the plasma discharge and improves the emission efficiency of secondary electrons. This protective film
38
is usually made from magnesium oxide (MgO).
A lower dielectric layer
44
and barrier ribs
48
are formed on the lower substrate
40
provided with the address electrode
42
X. The surfaces of the lower dielectric layer
44
and the barrier ribs
48
are coated with fluorescent layers
46
R,
46
G and
46
B. The address electrode
42
X is formed in a direction crossing the first electrode
34
Y and the second electrode
34
Z. The barrier rib
48
is formed in parallel to the address electrode
42
X to prevent an ultraviolet ray and a visible light generated by a discharge from being leaked to the adjacent discharge cells.
The fluorescent layers
46
R,
46
G and
46
B are excited by an ultraviolet ray generated during the plasma discharge to generate any one of red, green and blue visible light rays. An inactive gas for a gas discharge is injected into a discharge space defined between the upper and lower substrate
32
and
40
and the barrier rib
48
.
In the PDP according to another conventional embodiment, a hole
50
is defined at an intersection between the address electrode
42
X and the first electrode
34
Y. Such a hole
50
is formed by removing the fluorescent layers
46
R,
46
G and
46
B. Accordingly, an address discharge generated between the address electrode
42
X and the first electrode
34
Y is uniformly generated at all the discharge cells. In other words, since the fluorescent layers
46
R,
46
G and
46
B are not formed at an intersection between the first address electrode
42
X and the first electrode
34
Y, an address discharge is generated irrespectively of dielectric constants of the fluoresc
Fleshner & Kim LLP
LG Electronics Inc.
Philogene Haissa
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