Plasma display panel

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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Details

C345S060000, C315S169400

Reexamination Certificate

active

07012581

ABSTRACT:
A plasma display panel includes a first substrate, a second substrate spaced away from the first substrate, scanning and sustaining electrodes formed on the first substrate and extending in a first direction, a dielectric layer formed on the first substrate, covering the scanning and sustaining electrodes therewith, and a data electrode formed on the second substrate and extending in a second direction perpendicular to the first direction, each of the scanning and sustaining electrodes being comprised of a transparent electrode, the dielectric layer being comprised of a transparent dielectric layer, the dielectric layer having a high-capacity portion having a capacity higher than that of the rest of the dielectric layer, the high-capacity portion being spaced away from a discharge gap and extending in the first direction, each of the scanning and sustaining electrodes being formed with an opening between the discharge gap and the high-capacity portion.

REFERENCES:
patent: 6384532 (2002-05-01), Yoshioka et al.
patent: 2001/0054872 (2001-12-01), Okigawa et al.
patent: 2002/0140341 (2002-10-01), Nishio
patent: 2003/0048240 (2003-03-01), Shin et al.
patent: 11-67100 (1999-03-01), None
patent: 2001-236889 (2001-08-01), None
Kosugi et al., “Reduction of background emission at the set-up period of AC-PDP using ramp waveform”, Technical Report of IEICE, EID98-95, Jan. 1999, pp. 91-96, with English Abstract.

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