Electric lamp and discharge devices – With gas or vapor – Three or more electrode discharge device
Reexamination Certificate
2002-12-02
2004-03-09
Patel, Ashok (Department: 2879)
Electric lamp and discharge devices
With gas or vapor
Three or more electrode discharge device
C313S584000
Reexamination Certificate
active
06703782
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a panel structure of a surface-discharge-type alternating-current plasma display panel.
The present application claims priority from Japanese Applications No. 2002-1313, the disclosures of which are incorporated herein by reference for all purposes.
2. Description of the Related Art
In recent years, surface-discharge-type alternating-current plasma display panels (hereinafter referred to as “PDP”) have been receiving attention as slim, large sized color screen displays, and are becoming increasingly common in homes and the like.
Such PDPs typically include a front glass substrate and a back glass substrate opposite to the front glass substrate with a discharge space in between.
The front glass substrate is provided on its back surface with a plurality of row electrode pairs regularly arranged in the column direction and each extending in the row direction to form a display line, and a dielectric layer covering the row electrode pairs.
The back glass substrate is provided on the surface facing the front glass substrate with a plurality of column electrodes regularly arranged in the row direction and each extending in the column direction to intersect the row electrode pairs.
Thus, discharge cells are respectively formed at areas in the discharge space corresponding to the intersections of the column electrodes and the row electrodes. Red, green and blue phosphor layers are provided inside the individual discharge cells in the order of red, green and blue colors.
In the operation of the PDP for displaying an image, in an addressing period following a reset period for carrying out a reset discharge, an addressing discharge is selectively caused between one row electrode in the row electrode pair and the column electrode opposite the one row electrode in the individual discharge cell, for distribution of lighted cells (the discharge cell having wall charges formed on the dielectric layer) and non-lighted cells (the discharge cell having no wall charges formed on the dielectric layer) over the panel surface in accordance with an image to be displayed.
In a sustaining emission period following the addressing period, a discharge sustaining pulse is applied alternately to the paired row electrodes of the row electrode pairs in all of the display lines in order to excite the wall charges on the dielectric layer in each lighted cell to cause a sustaining discharge between the paired row electrodes. Then, ultraviolet light generated by the sustaining discharge excites the red, green or blue phosphor layer in each discharge cell to allow it to emit light for the generation of a display image.
In the prior art PDPs having a construction as described above, the addressing discharge occurs across the same discharge cell with the interposition of the red, green or blue phosphor layer as the sustaining discharge occurring in it. For this reason, the addressing discharge is subjected to influences ascribable to the phosphor layer, such as discharge properties varying among the phosphor materials of the three colors forming the phosphor layers, variations in the thickness of the phosphor layers produced in the manufacturing process for the PDP, and the like. Hence, the prior art PDPs have a significant difficulty in ensuring uniform addressing discharge properties among the individual discharge cells.
The prior art PDPs as described above needs a large discharge space in each discharge cell for an increase in the luminous efficiency. If a partition wall defining the discharge cells is increased in height for increasing the luminous efficiency, then this means an increase in the interval between the row electrode and the column electrode between which the addressing discharge is produced. This increased interval produces a problem of an increase in the starting voltage for the addressing discharge.
To solve the problems associated with the prior art as described above, the applicant of the present application suggested a PDP having the following structure in Japanese Patent Application No. 2001-213846 filed prior to the present application.
As illustrated in FIG.
9
and
FIG. 10
, the suggested PDP includes a partition wall
15
formed on the surface of a back glass substrate
13
facing the display screen and including first transverse walls
15
A, second transverse walls
15
B and vertical walls
15
C. The first transverse walls
15
A and the vertical walls
15
C of the partition wall
15
partition the discharge space defined between a front glass substrate
10
and the back glass substrate
13
into discharge cells.
Each of the discharge cells is divided into two cells by the second transverse wall
15
B: a display discharge cell C
1
a
opposite transparent electrodes Xa and Ya of a row electrode pair (X, Y), and an addressing discharge cell C
2
a
opposite back-to-back bus electrodes Xb and Yb of the adjacent row electrode pairs (X, Y). The display discharge cell C
1
a
and the addressing discharge cell C
2
a
are adjacent to each other in the column direction on either side of the second transverse wall
15
B, and communicate with each other by means of a clearance r′ formed between the front face of the interposed second transverse wall
15
B and a protective layer covering an additional dielectric layer
12
.
A protrusion rib
17
protrudes from a portion of the back glass substrate
13
facing each addressing discharge cell C
2
a
into the addressing discharge cell C
2
a
, to raise the corresponding part of the column electrode D in the direction of the inside of the addressing discharge cell C
2
a
. Hence, a space-distance s
2
between the part of the column electrode D and the bus electrode Yb facing the addressing discharge cell C
2
a
is smaller than a space-distance s
1
between a part of the column electrode D and the transparent electrode Ya facing the display discharge cell C
1
a.
In the suggested PDP, when a scan pulse is applied to the row electrodes Y and a data pulse is applied to the column electrodes D in the addressing period following the reset period, the addressing discharge occurs within the addressing discharge cell C
2
a
because the space-distance s
2
between the bus electrode Yb of the row electrode Y and the column electrode D opposite to each other on either side of the addressing discharge cell C
2
a
is smaller than the space-distance s
1
between the transparent electrode Ya of the row electrode Y and the column electrode D opposite to each other on either side of the display discharge cell C
1
a.
Charged particles generated through the addressing discharge in the addressing discharge cell C
2
a
pass through the clearance r′ to flow into the display discharge cell C
1
a
which is adjacent to the addressing cell C
2
a
concerned, with the second transverse wall
15
B in between. Thus, lighted cells and non-lighted cells are distributed in all of the display lines L on the panel in accordance with an image to be displayed.
FIG. 11
shows another construction of the suggested PDP described thus far. The PDP shown in
FIGS. 9 and 10
includes the protrusion rib
17
provided for raising the column electrode D inside the addressing discharge cell C
2
a
, whereas the PDP shown in
FIG. 11
includes a column electrode D′ having a conventional linear shape, and a dielectric layer
18
formed of high &egr; (epsilon) materials is formed in an addressing discharge cell C
2
′
a
to reduce the virtual discharge-distance between the column electrode D′ and the bus electrode Yb between which the addressing discharge is created.
However, both PDPs constructed as described above have a problem of a reduction in margins at the addressing discharge if variations in the space-distances s
2
between the bus electrode Yb and the column electrode D′ raised in the addressing discharge cell C
2
a
by the protrusion rib
17
(see
FIG. 10
) or in the discharge space between the bus electrode Yb and the surface of the high &egr; (epsilon) materials-made dielectric lay
Koshio Chiharu
Otani Eishiro
Taniguchi Hitoshi
Arent Fox Kintner Plotkin & Kahn
Patel Ashok
Pioneer Corporation
LandOfFree
Plasma display panel does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Plasma display panel, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Plasma display panel will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3284688