Plasma display device with reduced display defects

Details Plasma display device with reduced display defects Plasma display device with reduced display defects

2001-08-15

2003-10-07

Patel, Nimeshkumar D. (Department: 2879)

Electric lamp and discharge devices

With gas or vapor

Three or more electrode discharge device

C313S585000, C313S582000, C345S067000

Reexamination Certificate

active

06630790

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to flat-panel display devices, and more particularly to a plasma display device.
A plasma display device is a flat-panel display device of a light-emitting type that displays picture information by selectively inducing discharges in a gas filled between a pair of glass substrates.
It is important for the plasma display device to increase resolution and reduce power consumption at the same time.
2. Description of the Related Art
FIG. 1
is a diagram showing a basic structure of a conventional common plasma display device
10
.
The plasma display device
10
is basically defined by a display panel
11
and first through third driving circuits
12
A through
12
C that cooperate with the display panel
11
. The display panel
11
includes first discharge electrodes X
1
through X
m
and second discharge electrodes Y
1
through Y
m
that are alternately arranged parallel to each other and extend in the X direction of FIG.
1
. Further, the display panel
11
includes address electrodes A
1
through A
n
that extend in the Y direction of
FIG. 1
to intersect the first and second discharge electrodes X
1
through X
m
and Y
1
through Y
m
. The first discharge electrodes X
1
through X
m
, the second discharge electrodes Y
1
through Y
m
, and the address electrodes A
1
through A
n
are selectively activated by the first through third driving circuits
12
A through
12
C, respectively.
For instance, an address voltage is applied between a selected one of the first discharge electrodes X
1
through X
m
(X
2
in
FIG. 1
) and a selected one of the address electrodes A
1
through A
n
(A
4
in FIG.
1
), so that a discharge is started between the first discharge electrodes X
2
and the address electrode A
4
. Next, by applying a discharge-sustaining voltage between the first discharge electrodes X
2
and the adjacent second discharge electrode Y
2
by the driving circuits
12
A and
12
B, a discharge is started between the first discharge electrodes X
2
and the second discharge electrode Y
2
in a display cell selected by the address electrode A
4
. The discharge is maintained while the selected display cell is activated.
It is required for such a plasma display device to increase resolution by narrowing pitches between electrodes and reduce power consumption at the same time.
FIG. 2
is a sectional view of the conventional plasma display panel
11
, whose type is referred to as an ALIS (Alternate Lighting of Surfaces) type, taken along the Y direction of FIG.
1
. This type of plasma display panel is disclosed in Japanese Patent No. 2801893.
The display panel
11
of
FIG. 2
is defined by glass substrates
11
A and
11
B opposed to each other, and a discharge gas is filled between the glass substrates
11
A and
11
B.
The glass substrate
11
A may be referred to as a front or display-side substrate facing a viewer of the display panel
11
, and the glass substrate
11
B may be referred to as a rear substrate provided across the glass substrate
11
A from the viewer.
More specifically, the glass substrate
11
A has the first and second discharge electrodes X
1
through X
m
and Y
1
through Y
m
alternately arranged with the same pitch on its side opposing the glass substrate
11
B. The glass substrate
11
B has the address electrodes A
1
through A
n
formed on its side opposing the glass substrate
11
A. The first and second discharge electrodes X
1
through X
m
and Y
1
through Y
m
are formed of a transparent conductive film of ITO (In
2
O
3
.SnO
2
), and the first discharge electrodes X
1
through X
m
(ITO electrodes) has low-resistance bus electrodes x
1
through x
m
formed thereon, respectively. Similarly, the second discharge electrodes Y
1
through Y
m
(ITO electrodes) has low-resistance bus electrodes y
1
through y
m
formed thereon, respectively. On the other hand, the address electrodes A
1
through A
n
are formed of low-resistance metal patterns to extend in a direction to cross a direction in which the bus electrodes x
1
through x
m
or y
1
through y
m
extend. The first and second discharge electrodes X
1
through X
m
and Y
1
through Y
m
and the bus electrodes x
1
through x
m
or y
1
through y
m
are covered with a dielectric film
11
a
on the glass substrate
11
A, and the address electrodes A
1
through A
n
are covered with a dielectric film
11
b
on the glass substrate
11
B. Further, as is not shown in the drawing, phosphor patterns of red, green, and blue are applied and formed on the dielectric film
11
b
in accordance with display pixels.
In the display panel
11
of the above-described structure, discharges caused between the glass substrates
11
A and
11
B excite the phosphor patterns to produce light, which is emitted through the glass substrate
11
A as indicated by arrow in FIG.
2
.
FIGS.
3
(A) and
3
(B) are plan views of patterns of the first and second discharge electrodes X
1
through X
m
and Y
1
through Y
m
formed on the glass substrate
11
A in another conventional ALIS-type plasma display device including the display panel
11
. The X and Y directions of FIGS.
3
(A) and
3
(B) correspond to those of FIG.
1
.
According to FIG.
3
(A), the first and second discharge electrodes X
1
through X
m
and Y
1
through Y
m
are formed of series of repeated T-shaped ITO patterns (electrodes) XT and YT extending from longitudinal sides of the corresponding bus electrodes x
1
through x
m
and y
1
through y
m
on the glass substrate
11
A, respectively. Each ITO pattern has a tip part T
A
of a width A that extends in the extending direction of the bus electrodes x
1
through x
m
or y
1
through y
m
and a narrow neck part T
B
connecting the tip part T
A
and a corresponding one of the bus electrodes x
1
through x
m
or y
1
through y
m
. Each adjacent ITO patterns are arranged with a pitch corresponding to the resolution of the display panel
11
, for instance, a pitch of 300 &mgr;m in FIG.
3
(A), and a discharge is sustained in a gap (discharge gap) of a width g formed between each opposed ITO patterns XT and YT.
FIG. 4
is a diagram showing a structure of the glass substrate
11
B of FIG.
2
.
According to
FIG. 4
, ribs
11
C are formed with given pitches on the glass substrate
11
B to extend in the Y direction of FIG.
1
. Grooves G
1
through G
n
are formed between the ribs
11
C, and the address electrodes A
1
through A
n
are formed in the corresponding grooves G
1
through G
n
. Further, the address electrodes A
1
through A
n
are covered with the dielectric film
11
b
in the corresponding grooves G
1
through G
n
, and the phosphor patterns R, G, and B of red, green, and blue, respectively, are formed on the dielectric film
11
b.
The glass substrate
11
B of
FIG. 4
is reversed to be placed on the glass substrate
11
A so that, as shown in
FIG. 5
, the grooves G
1
through G
n
formed between the ribs
11
C contain the corresponding ITO patterns XT and YT. In
FIG. 5
, the ribs
11
C are indicated by broken lines for easy understanding of the drawing.
Thus, the plasma display device having the electrode structure of
FIG. 3
can reduce power consumption and a driving voltage by employing the T-shaped discharge electrode patterns XT and YT. However, since the ITO film forming the discharge electrode patterns XT and YT has a thickness of 1 &mgr;m or less, any discharge electrode pattern XT or YT can be broken by slight unevenness of the surface of the glass substrate
11
A as indicated by a circle in FIG.
5
. Such breakage prevents a desired cell from emitting light, thus resulting in a defective display.
Therefore, in order to secure a normal display even in the case of such breakage of any discharge electrode pattern XT or YT, the inventors of the present invention have proposed in Japanese Laid-Open Patent Application No. 2000-251739 auxiliary electrodes P to be provided, in the case of
FIG. 5
, to the bus electrodes x
1
, x
2
, y
1
and y
2
so as to extend to the tip parts TA of the discharge electrode patterns XT

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