Plasma addressing display device

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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Details

C345S062000, C345S066000, C345S067000, C315S169100, C315S169200

Reexamination Certificate

active

06597332

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a plasma addressing display device having a display cell and a plasma cell overlapped together. More particularly, it relates to a plasma cell scanning circuit structure and to a plasma cell scanning method.
2. Description of Related Art
A plasma addressing display device is disclosed in, for example, Japanese Laid-Open Patent H-4-265931. The plasma addressing display device has a flat panel structure comprising a display cell
1
, a plasma cell
2
and a common intermediate sheet
3
interposed therebetween, as its structure is shown in FIG.
1
. The intermediate sheet
3
is e.g., a glass plate of extremely thin thickness and is termed a micro-sheet. The plasma cell
2
is formed by a lower glass substrate
4
bonded to the intermediate sheet
3
and a dischargeable gas is charged in a gap in-between. On the inner surface of the lower glass substrate
4
A, there are formed striped discharge electrodes.
These discharge electrodes operate as anodes A and cathodes K Since the discharge electrodes can be printed on the flat glass substrate
4
by e.g., a screen printing method, superior productivity and operability can be assured. A number of partiyions
7
are formed so that a set of the anode A and the cathode K is delimited by two neighboring partitions
7
to constitute plural discharge channels
5
by dividing the gap in which is sealed a dischargeable gas.
These partitions
7
also can be fabricated by a screen printing method, with the upper ends of the partitions
7
bearing against a surface of the intermediate sheet
3
. Plasma discharge is produced across the anode A and the cathode K of respective opposite polarities in a discharge channel
5
surrounded by the neighboring partitions
7
. Meanwhile, the intermediate sheet
3
and the lower glass substrate
4
are bonded together by e.g., glass frit.
On the other hand, the display cell
1
is fabricated using a transparent upper glass substrate
8
. This glass substrate
8
is bonded to the opposite side surface of the intermediate sheet
3
via a pre-set gap using e.g., a sealing material in a gap of the display cell
1
is sealed a liquid crystal
9
as an opto-electric material. On the inner surface of the upper glass substrate
8
are formed plural signal electrodes Y. On intersections of the signal electrodes Y and the discharge channels
5
are formed matrix-shaped pixels.
On the inner surface of the glass substrate
8
are also formed color filters
13
for allocating, e.g., three prime colors R, G and B to respective pixels. The flat panel of the above-described structure is of the transparent type and the plasma cell
2
is positioned at the incident side, whilst the display cell
1
is positioned on the exiting side. A backlight
12
is mounted on the side of the plasma cell
2
.
In the plasma addressing display device, column-shaped discharge channels
5
, in which occurs plasma discharge, arc line-sequentially scanned in a switching fashion. In synchronism with this scanning, picture signals are applied to the column-shaped signal electrodes Y on the display cell side to execute display driving.
When plasma discharge occurs in the discharge channels
5
, the inside thereof is at a uniform anode potential such that pixels are selected on the row basis. That is, each discharge channel
5
corresponds to a scanning line, and operates as a sampling switch. If, with the plasma sampling switch on, picture signals are applied to the respective signal lines, sampling takes place to control pixel on/off.
The pixel signals are held in the pixels unchanged even after the plasma sampling switch is turned off. The display cell
1
is responsive to the pixel signals to modulate the incident light from the backlight
12
into outgoing light to display a picture.
FIG.
2
. schematically shows only two pixels.
FIG. 2
shows only two signal electrodes Y
1
, Y
2
, a sole cathode K
1
and a sole anode A
1
to aid in the understanding. Each pixel
11
is of a layered structure comprising signal electrodes Y
1
, Y
2
, a liquid crystal
9
, an intermediate sheet
3
and a discharging channel. During plasma discharge, the discharge channel is connected to substantially an anode potential. If, in this state, picture signals are applied to the respective signal electrodes Y
1
, Y
2
, electrical charges are injected into the liquid crystal
9
and the intermediate sheet
3
.
If the plasma discharge comes to a close, the discharge channel reverts to an insulated state, so that a floating potential prevails such that the injected charges are held in the respective pixels by way of a so-called sample-and-hold operation. So, the discharge channel operates as an individual sampling switch element, so that the respective pixels are schematically indicated with switching symbols S
1
.
The liquid crystal
9
and the intermediate sheet
3
, held between the signal electrodes Y
1
, Y
2
and the discharge channel, operate as sampling capacitors. When the sampling switch S
1
is turned on by line sequential scanning, picture signals are written into the sampling capacitors. The respective pixels are turned on or off responsive to the picture signal level. The signal voltage is held on the sampling capacitor even after the sampling switch S
1
is turned off to perform an active matrix operation of the display device. Meanwhile, the effective voltage applied to the liquid crystal is determined by capacitance division with respect to the intermediate sheet
3
.
FIG. 3
is a timing chart showing the scanning processing timing for sequentially discharging the column-shaped discharge channel and the signal processing timing for writing in respective pixels by supplying picture signals to the column-shaped signal electrodes. The routine practice is to complete the discharging of relevant discharge channels and writing of picture signals in relevant pixels within a period of selection of a sole line (scanning line).
For example, in the VGA standard display device, there are 480 lines, such that 480 discharge channels are formed. In this case, the respective lines are sequentially selected at a pre-set period (1H=horizontal period=32 &mgr;s). So, the discharge period allocated to a discharge channel of each line is (1H=32 &mgr;s at the maximum.
In the illustrated example, the discharging period is set to be not longer than 1H, such as to 13 &mgr;s, in order to complete the discharging of the discharge channel and the writing of picture signals during the 1H period. Specifically, a selection pulse with a pulse width of 13 &mgr;s is applied to discharge a discharge channel during the first half of the 1H period and picture signals are written in the latter half of the 1H period. It is because picture signals are written in the course of resetting to the original state after discharge.
In a timed relation to end of discharge for a line
1
, corresponding picture signals
1
are written. In the next horizontal period, the line
2
is selected and corresponding picture signals
2
are written. In the next horizontal period, the line
3
is selected and corresponding picture signals
3
are written The line
4
then is selected to write corresponding picture signals
4
. Thus, in the conventional driving method, since the selection pulse width allocated to a line is limited in the conventional driving method, there lacks tie degree of freedom in setting the discharge voltage Vu and the discharge current Iu necessary in uniform writing of picture signals.
Since stable plasma discharge is induced with a limited selection pulse width, the discharge voltage Vu and the discharge current Iu were set to higher value states with a certain allowance. In particular, if the discharge current is high, the damage to the electrode material is increased, such that practically sufficient panel durability cannot be assured.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a plasma addressing display device that is free from the above-me

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