Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1999-09-08
2003-07-22
Hjerpe, Richard (Department: 2674)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S063000, C315S169300, C313S582000, C349S032000
Reexamination Certificate
active
06597330
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a plasma addressed display device including a flat panel having a display cell and a plasma cell, that one overlapped, and a peripheral area. More particularly, it relates to a technique for achieving high resolution of scanning lines formed in the plasma cell.
2. Description of the Related Art
The structure of a plasma addressed display device, disclosed in, for example, the Japanese Laying-Open Patent H-4-265931, is shown in FIG.
1
. As shown therein, the plasma addressed display device is of a flat panel structure comprised of a display cell
1
, a plasma cell
2
and a common intermediate sheet
3
interposed therebetween. The intermediate sheet
3
is formed by an ultra-thin glass plate, termed a micro-sheet. The plasma cell
2
is made up of a lower glass substrate
4
, connected to the intermediate sheet
3
, and a dischargeable gas is sealed in a gap defined therebetween. On the inner surface of the lower glass substrate
4
are formed stripe-shaped scanning electrodes operating as anodes A and cathodes K arranged as sets. Plural barrier ribs
7
are provided for demarcating the sets of the anodes A and the cathodes K from one another. The gap charged with the dischargeable gas is split by these barrier ribs to delimit discharge channels
5
. The neighboring discharge channels
5
are isolated from one another by the barrier ribs
7
. These barrier ribs
7
can be printed by the screen printing method, with the top sides of the barrier ribs compressing against the sides of the intermediate sheet
3
. Within the discharge channels
5
, surrounded by the paired barrier ribs
7
, plasma discharge is induced between the anodes A and the cathodes K. The intermediate sheet
3
and the lower glass substrate
4
are interconnected by e.g., glass frit.
The display cell
1
is constituted by a transparent upper glass substrate
8
, which is connected to the other surface of the intermediate sheet
3
by a sealant to define a gap. Within this gap is sealed a liquid crystal
9
as an electro-optical material. A signal electrode Y is formed on the inner surface of the upper glass substrate
8
. In each intersecting point of the signal electrode Y and the discharge channel
5
is formed a pixel to form a matrix of pixels. On the inner surface of the glass substrate
8
, there is provided a color filter
13
to allocate three prime colors R, G and B to each pixel. The flat panel, constructed in this manner, is of a transmission type. For example, the plasma cell
2
and the display cell
1
are arranged on the incident side and on the outgoing side, respectively. On the plasma cell side is mounted a backlight
12
.
With the above-described plasma addressed display device, the row-shaped discharge channels
5
in which occurs plasma discharge, are switched and scanned line-sequentially, while picture data are applied to column-shaped signal electrodes Y on the display cell side in synchronism with the scanning to effect display driving. If plasma discharge occurs in the discharge channels
5
, the inside of the discharge channel
5
is at an anode potential substantially uniformly to effect pixel selection on the scanning line basis. That is, each discharge channel
5
corresponds to a scanning line and operates as a sampling switch. If, with the plasma sampling switch on, pixel data is applied to each pixel, sampling takes place to control the pixel turning on or off. With the sampling switch turned off, the pixel data are held in the pixels. That is, in the display cell
1
, the incident light from the backlight
12
is modulated into outgoing light, depending on the picture data, to display a picture.
FIG. 2
shows only two pixels
11
. For assisting in the understanding, only two signals electrodes Y
1
, Y
2
, a sole cathode K
1
and a sole anode A
1
are shown. Each pixel
11
has a layered structure of the signals electrodes Y
1
, Y
2
, a liquid crystal
9
, an intermediate sheet
3
and a discharge channel
5
. The discharge channel is connected substantially to the anode potential during plasma discharge. If, in this state, picture data is applied across the signal electrodes Y
1
, Y
2
, electrical charges are implanted into the liquid crystal
9
and the intermediate sheet
3
. On termination of the plasma discharge, the discharge channel is restored to the insulated state, so that the potential is the floating potential such that the implanted electrical charges are held in the respective pixels by way of effecting the sample-and-hold operation. Since the discharge channel operates as a sampling switch element provided in each pixel, it is depicted symbolically by a switching symbol S
1
. On the other hand, the liquid crystal
9
and the intermediate sheet
3
, held between the signal electrodes Y
1
, Y
2
and the discharge channel, operate as sampling capacitors. If, by line-sequential scanning, the sampling switch S
1
is in a conducting state, picture data is written in the sampling capacitors, such that the respective pixels are turned on or off depending on the data voltage level. After the sampling switch S
1
is in the non-conducting state, the data voltage is held in the sampling capacitor to effect the active matrix operation of the display device. Meanwhile, the effective voltage applied to the liquid crystal
9
is decided by capacity division with respect to the intermediate sheet
3
.
In the above-described plasma addressed display device, if the picture is to be improved in resolution, the pixels arranged in a matrix configuration need to be increased in pixel density. For reducing the pixel size in the horizontal direction, that is in the row direction, it suffices to reduce the line width of the column-shaped signal electrodes. On the other hand, for reducing the pixel size in the vertical direction, that is in the column direction, it suffices to reduce the arraying pitch of the row-shaped discharge channel. However, the respective discharge channels are isolated from one another by the barrier ribs. Due to limitations in the machining techniques, it is difficult to reduce the thickness of the barrier ribs drastically, such that there is set a minimum thickness for assuring e.g., mechanical strength. Therefore, if the arraying pitch of the discharge channels is diminished, the area taken up by the thickness of the barrier ribs is relatively increased to diminish the area of the opening through which is transmitted the light. Stated differently, the larger the number of the discharge channels, that is the scanning lines, the lower is the open area ratio in the panel. Moreover, since the barrier ribs are of a certain height, these obstruct the obliquely incident light rays. Thus, the shorter the arraying pitch of the barrier ribs, the larger is the ratio of obstruction of the obliquely incident light, thus leading to the narrow viewing angle from the viewer.
If it is attempted to reduce the arraying pitch in the plasma addressed display device, the open area ratio is necessarily reduced due to limitations in the manufacturing process of the barrier ribs or scanning electrodes. The result is insufficient brightness of the display. If, for compensation, the light emitting volume of the backlight is increased, the power consumption is increased. If the barrier ribs or the electrode structures are reduced in size, the rate of occurrence of defects is necessarily increased, thus giving rise to the incompatibility between the productivity and the opening area ratio. For example, in the plasma cell structure shown in
FIG. 3
, the arraying pitch of the discharge channels
5
is 1000 &mgr;m, with the width of the barrier ribs
7
being 200 &mgr;m and with the width of the anode A or the cathode K being 200 &mgr;m. Thus, the open area ratio, of the illustrated panel is 1−(200+200+200)/1000=0.4, or 40%. If the arraying pitch is reduced from 1000 &mgr;m to 700 &mgr;m, the open area ratio is as low as 1−(200+200+200)/700=0.14 or 14%. In such case
Hayashi Masatake
Itou Hiroshi
Hjerpe Richard
Nguyen Francis
Sonnenschein Nath & Rosenthal
Sony Corporation
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