Planarized semiconductor product

Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – Insulating coating

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Details

437228, 257641, 257644, 257646, 257650, H01L 2188

Patent

active

052452131

ABSTRACT:
An integrated circuit structure is presented that includes a substrate in which integrated circuit elements are constructed, a first interconnection metalization over the substrate interconnecting selected ones of the integrated circuit elements, and an oxide layer over the substrate and the first metal interconnection pattern. A glass layer over the oxide layer is substantially planar between portions that overlie the metalization and portions that do not over lie the metalization.

REFERENCES:
patent: 4508815 (1985-04-01), Ackmann et al.
patent: 4676868 (1987-06-01), Riley et al.
patent: 4826786 (1989-05-01), Merenda et al.
patent: 4962063 (1990-10-01), Maydan et al.
patent: 4965226 (1990-10-01), Gootzen et al.

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