Compositions – Etching or brightening compositions
Reexamination Certificate
1999-10-12
2001-07-31
Mills, Gregory (Department: 1763)
Compositions
Etching or brightening compositions
C252S079200, C252S079300
Reexamination Certificate
active
06267909
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a planarization composition which is particularly useful for thinning, polishing and planarizing integrated circuitry deposited on semiconductor wafers which have had at least one metal conducting film deposited on their surfaces. The thinning, polishing and planarizing serves to remove the metal film. The invention also relates to a thinning, polishing and planarizing apparatus and to a method for carrying out the thinning, polishing and planarizing operation.
BACKGROUND OF INVENTION
In semiconductor processing, it is common to deposit a hard material, for example a metal or metal nitride such as tungsten, titanium, titanium/tungsten or titanium nitride, with the deposited material filling holes which extend into the body of an insulating thin film and provide an electrical conducting path from the semiconducting or conducting layer under the insulating surface or conductor to a distance above the surface. The deposited material constitutes what is commonly referred to as a via, plug, trench or contact. When this process is carried out, a thin coating of the material being deposited to form the via is also deposited globally on the upper surface of the insulating layer. This deposited metal layer above the insulating layer must be removed prior to carrying out additional operations on the wafer. The removal of layers of this nature is generally carried out by a thinning, polishing and planarizing operation utilizing a hard surface of a polishing pad and a polishing slurry which wets the pad and is frictionally moved against the excess deposited metal surface to be removed. The slurry generally includes alumina particles as the abrasive material along with a liquid chemical carrier and reactant. Basically, the alumina and the chemical carrier are respectively hard and reactive enough so as to abrade away the excess deposited metal which has been deposited on the insulating surface when forming the vias, plugs or contact regions. The result, however, is a thinned and scratched surface and is not uniform (planar) enough to be suitable for the manufacture of more advanced integrated circuits which utilize submicron geometries. Further, the thinning, polishing and planarizing operation is considered too slow because of the titanium layer being too resistant to today's thinning, polishing and planarizing operation.
It is well known to make use of chemical mechanical polishing (CMP). In this process, more rapid thinning, polishing and planarization can occur through utilization of an abrasive material, generally alumina or silica, along with a liquid carrier and a compound which is corrosive or oxidative toward or will dissolve the substrate. For example, U.S. Pat. No. 5,391,258 of Brancaleoni, et al. discusses such a process for enhancing the polishing rate of silicon, silica or silicon-containing articles including composites of metals and silica. The composition includes an oxidizing agent along with an anion which suppresses the rate of removal of the relatively soft silica thin film. The suppressing anion may be any of a number of carboxylic acids. Alumina is used as the abrasive material.
It is also known to utilize another abrasive material, specifically silica of very small size, to polish substrates such as rough cut silicon wafers prior to beginning their processing into integrated circuit devices. As an example, Shimizu, et al., in U.S. Pat. No. 4,842,837, teaches a process for producing fine spherical silica having a particle size of 0.5&mgr; and less. The resulting colloidal silica is used as a polish for semiconductor wafers, specifically silicon wafers. The particles are mono-disperse whereby polishing of the relatively soft silicon wafers surface can be carried out to produce a substantially flat wafer surface. Such particles, by themselves and without the aids of chemical action, are not, however, abrasive enough to be used to effectively polish off the above mentioned materials such as tungsten, titanium or titanium nitride. Indeed, such colloidal silica, which has a pH above 7, and in the absence of an oxidizing agent, is not capable of effectively, i.e., at an acceptably great rate, thinning and planarizing metal or metal nitrides. Furthermore, because the pH is above 7, the exposed silica would be preferentially etched while the metal and metal nitride layers, relatively speaking, remain un-thinned and un-planarized. Substantial and undesirable dishing of the silicon dioxide would occur around the metal and metal nitride plugs, vias, etc. To be an effective thinning and planarizing CMP slurry for metals and metal nitrides, it is essential that the metal and metal nitride be thinned and planarized at a rate substantially higher than the exposed silicon oxides.
PCT Application WO 95/24054, published Sep. 8, 1995, shows that oxidizing agents such as hydrogen peroxide can be added to polishing slurries when the slurries contain an ion for limiting the rate of removal of silicon and silicates as set forth in U.S. Pat. No. 5,391,258 discussed immediately above. Other oxidizers are also mentioned. In particular, potassium iodate and sodium iodate are disclosed as being oxidizing agent useful in such polishing slurries. As with U.S. Pat. No. 5,391,258 the abrasive agent utilized is alumina.
U.S. Pat. No. 5,376,222 discloses the use of colloidal silica in an alkaline solution for polishing a silica film on a semiconductor. The polishing solution includes a cation of an alkali metal, an alkaline earth, or an ammonium ion. The preferred composition includes sodium or potassium ion. The slurry is not used to remove metals but only silica.
U.S. Pat. No. 3,877,183 discloses the use of precipitated silicates and/or silicofluorides as polishing substances for semiconductor materials. These polishing substances are utilized to polish the semiconductor, namely, silicon.
A very real problem exists with respect to polishing materials such as metals and metal nitrides and silicon dioxide insulating layers so as to remove them at sufficient rates and selectivities. In particular, when holes are made into insulating layers, for example into doped silicon dioxide layers, and then metals are deposited in those holes to provide conducting metal vias from one level of a semiconductor device to another, the resulting excess metal conducting film on the exposed doped oxide surface of the wafer must be polished away, thinned and planarized without appreciably thinning and planarizing the newly exposed doped or undoped silicon dioxide. It is desirable to stop the thinning and planarizing process once the excess metals and metal nitride have been polished away thus exposing the underlying doped silicon dioxide layer. Ideally, all of the exposed surfaces of the metal, metal nitride and doped silicon dioxide should be perfectly planar. However, the most advanced abrasive and liquid chemical CMP slurries of the prior art are becoming less effective as integrated circuit manufacturers strive for reduced scratch density, improved surface roughness, greater throughput, improved selectivity, and improved post-CMP surface cleanliness.
At the start of a typical prior art thinning and planarizing (CMP) process, one metal layer is exposed. After a substantial amount of thinning and planarization, a second metal nitride layer, a third metal layer and a silicon dioxide layer are exposed to the thinning and planarizing process. With the conventional alumina-based thinning and planarizing process, which includes, intermixed with the alumina abrasive, an acidic liquid system and an oxidizer, each exposed metal and metal nitride thins and planarizes at a different rate. For instance, the most widely used slurry system thins and planarizes the second exposed metal, the titanium so-called “glue” layer, at a substantially different rate than other exposed metal (tungsten) and metal nitride (titanium nitride) layers. The result is a less planar surface than is desired by the integrated circuit device manufacturer. Further, as the polishing process continues to
Currie James E.
Grebinski Thomas J.
Jones Michael
Advanced Technology & Materials Inc.
Borson D. Benjamin
Goudreau George
Mills Gregory
Zitzmann Oliver A.
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