Planar view TEM sample preparation from circuit layer...

Details Planar view TEM sample preparation from circuit layer... Planar view TEM sample preparation from circuit layer...

2007-04-24

2007-04-24

Tang, Minh N. (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S1540PB, C250S492300, C438S463000

Reexamination Certificate

active

11022325

ABSTRACT:
A method of preparing a planar view TEM sample of a planar portion of a circuit layer structure formed on a substrate. The method includes polishing the substrate circuit layer structure until a cross-sectional polishing face has substantially reached a first side face of the planar portion of the circuit layer structure; forming a trench structure in the cross-sectional polishing face. The trench structure extends into the cross-sectional polishing face substantially in the direction parallel to the substrate such that top and bottom faces of the planar portion of the circuit layer structure are exposed, wherein the planar portion of the circuit layer structure extends substantially parallel to the substrate from the first side face. The method further includes performing a cut around the first side face to free the planar portion of the circuit layer structure.

REFERENCES:
patent: 6188068 (2001-02-01), Shaapur et al.
patent: 6194720 (2001-02-01), Li et al.
patent: 6362475 (2002-03-01), Bindell et al.
patent: 6420722 (2002-07-01), Moore et al.

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