Planar vertical channel DMOS structure

Details Planar vertical channel DMOS structure Planar vertical channel DMOS structure

1988-08-24

1991-07-23

Hille, Rolf

357 231, 357 41, 357 45, 357 55, H01L 2978

Patent

active

050347853

ABSTRACT:
A DMOS power transistor has a vertical gate and a planar top surface. A vertical gate fills a rectangular groove lined with a dielectric material which extends downward so that source and body regions lie on each side of the dielectric groove. Carriers flow vertically between source and body regions and the structure has a flat surface for all masking steps.

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Chang et al., "Self-Aligned. . . of 1 mr. cm.sup.2 ", IEEE, vol. ED-34, No. 11, Nov. 1987.
Ueda et al., "A New Injection Suppression Structure for Conductivity Modulated Power MOSFETS", Confer. on Solid State Devices & Materials, Tokyo, 1986, pp. 97-100.

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