Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1998-03-23
2000-05-16
Chaudhuri, Olik
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438435, H01L 2176
Patent
active
060636939
ABSTRACT:
Method for improving the topography over trench structures in which the provision of extra poly-semiconductor material e.g. polysilicon or nitrate or oxide in the regions of the trench edges and, if necessary, the subsequent oxidation of the extra material prevents the occurrence of regions of high mechanical stress.
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patent: 5792685 (1998-08-01), Hammerl et al.
Wolf, S. "Silicon Processing for the VLSI Era, vol. II", Lattise Press USA, pp. 45-56, Fig. 2.34, 2.35, 1990.
Ogren Nils
Sjodin H.ang.kan
Soderbarg Anders
Zackrisson Mikael
Chaudhuri Olik
Duy Mai Anh
Telefonaktiebolaget LM Ericsson
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