Planar transferred electron logic device

Details Planar transferred electron logic device Planar transferred electron logic device

1975-06-24

1976-11-09

Miller, Jr., Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

331107G, 357 3, H03K 326, H03F 136, H01L 2726

Patent

active

039913287

ABSTRACT:
A planar transferred electron device is biased such that the voltage across the anode and cathode electrodes is above that of a threshold voltage in the presence of which the device is characterized by a transfer of electrons from a high to a low mobility sub-band and the formation of domains. A reverse biasing potential is applied between the gate and cathode electrodes which is of sufficient magnitude to cause in the quiescent state the suppression of the formation of these domains. When signals above a given level are provided between the gate and cathode electrodes, the device operates according to a transferred electron effect including the formation of the domains.

REFERENCES:
patent: 3447044 (1969-05-01), Sandbank et al.
patent: 3538400 (1970-11-01), Yanai et al.
patent: 3588736 (1971-06-01), McGroddy
patent: 3602734 (1971-08-01), Matsukura et al.
patent: 3766372 (1973-10-01), Kataoka et al.
"Oscillator" by Esposito et al. - IBM Tech. Discl. Bull., vol. 12, No. 11, Apr. 1970, pp. 1755-1756.

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