Planar process using common alignment marks for well implants

Fishing – trapping – and vermin destroying

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437 34, 437924, H01L 2122

Patent

active

055003923

ABSTRACT:
A preferred embodiment of the present invention is a method of forming a device on a semiconductor substrate of a first conductivity type, the method comprising: forming a semiconducting layer on the substrate; etching alignment marks in the semiconducting layer (102); forming a first mask on the semiconducting layer to expose portions of the semiconducting layer; introducing dopants of a second conductivity type opposite the first conductivity type into the exposed portions of the semiconducting layer to form high-voltage tanks (104); removing the first mask; annealing the dopants introduced to form high-voltage tanks of a second conductivity type (105); forming a second mask on the semiconducting layer to expose second portions of the semiconducting layer; introducing dopants of a second conductivity type into the exposed second portions of the semiconducting layer to form low-voltage tanks (106); removing the second mask; forming a third mask on the semiconducting layer to expose third portions of the semiconducting layer; introducing dopants of a first conductivity type into the exposed third portions of the semiconducting layer to form high-voltage tanks (107); removing the third mask; forming a fourth mask on the semiconducting layer to expose fourth portions of the semiconducting layer; introducing dopants of a first conductivity type into the exposed fourth portions of the semiconducting layer to form low-voltage tanks (108); and annealing dopants introduced to form high-voltage and low-voltage tanks of the first and second conductivity types.

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patent: 5075242 (1991-12-01), Nakahara
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