Planar laminate substrate and method for fabricating organic...

Details Planar laminate substrate and method for fabricating organic... Planar laminate substrate and method for fabricating organic...

2011-06-07

2011-06-07

Van, Luan V (Department: 1724)

Electrolysis: processes, compositions used therein, and methods

Electrolytic coating

Coating selected area

Reexamination Certificate

active

07955485

ABSTRACT:
The present invention is a method of manufacturing miniaturized organic laminate substrate PCB, semiconductors, semiconductor wafers and semiconductor devices that have a 50% reduction in physical dimensions with respect to prior art existing organic laminate substrate PCB, semiconductors, semiconductor wafers and semiconductor devices. The base planar substrate has a vapor deposited 0.02 mil thick copper cladding thereon its first planar surface that has been affixed atop a hydrophillic layer, and an adhesive layer on its second planar surface. The copper cladding has sufficient peel strength and a low enough etch factor so as to allow 10 micron (or smaller) electrical trace pathways to be formed thereon when the steps of a specifically designed manufacturing methodology are followed.

REFERENCES:
patent: 4543295 (1985-09-01), St. Clair et al.
patent: 5783641 (1998-07-01), Koh et al.
patent: 6162512 (2000-12-01), Koh et al.
patent: 6824827 (2004-11-01), Katsuki et al.

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