Planar in-line resistors for superconductor circuits

Details Planar in-line resistors for superconductor circuits Planar in-line resistors for superconductor circuits

1997-01-02

1999-06-15

Saadat, Mahshid

Active solid-state devices (e.g., transistors, solid-state diode

Superconductive contact or lead

On integrated circuit

257661, 338325, 338308, 338320, 505191, 505231, 505237, H01L 3900, H01B 1200, B32B 1200

Patent

active

059125039

ABSTRACT:
A method of fabricating a low-inductance, in-line resistor includes the steps of: depositing a superconductive layer 12 on a base layer 14; patterning an interconnect region 16 on the superconductive layer 12; and converting the interconnect region 16 of the superconductive layer 12 to a resistor material region 18. The resistor region 18 and the superconductive layer 12 are substantially in the same plane. The method can further include the steps of depositing a conductive layer 22 on the resistor region 18 and on the photo-resist layer 20, and lifting off the photo-resist layer 20 to leave the conductive layer 22 on the resistor region 18. As such, the conductive layer 22 provides a low sheet resistivity for the resistor region 18. In another embodiment, the method includes the steps of: depositing in-situ a superconductive layer 12 on a base layer 14; depositing in-situ a conductive layer 22 on the superconductive layer 12 to form a bi-layer 24; patterning an interconnect region 16 on the bi-layer 24; and converting the interconnect region 16 of the bi-layer 24 to a resistor material region 18.

REFERENCES:
patent: 5140001 (1992-08-01), Allen et al.
patent: 5229360 (1993-07-01), Shiga et al.

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