Planar diffusion process for manufacturing monolithic integrated

Details Planar diffusion process for manufacturing monolithic integrated Planar diffusion process for manufacturing monolithic integrated

1974-10-01

1976-05-11

Rutledge, L. Dewayne

Metal treatment

Process of modifying or maintaining internal physical...

Chemical-heat removing or burning of metal

29576E, 148191, 357 44, 357 48, H01L 2176, H01L 2120

Patent

active

039560350

ABSTRACT:
This relates to a process for manufacturing monolithic integrated circuits comprising at least one pair of complementary bipolar planar transistors. The pair of transistors, having two buried layers and two superimposed epitaxially deposited layers upon a semiconductor substrate body, are manufactured by deposition of an epitaxial layer having a thickness wherein the base zone of the pnp-transistor remains and is surrounded by a p-conducting zone which is diffused during the diffusion of the base zone of the npn-transistor and a portion of an insulating zone.

REFERENCES:
patent: 3595713 (1971-07-01), De Brebisson et al.
patent: 3595714 (1971-07-01), Thire et al.
patent: 3607465 (1971-09-01), Frouin
patent: 3622842 (1971-11-01), Oberal
patent: 3767486 (1973-10-01), Imaizumi

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