Planar bond pad design and method of making the same

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Ball or nail head type contact – lead – or bond

Reexamination Certificate

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C257S781000

Reexamination Certificate

active

07053490

ABSTRACT:
Techniques for an integrated circuit device with planar bond pads are provided. A metal layer region is formed on a substrate. The integrated circuit device also includes a passivation layer that has an opening formed around the metal layer region. The passivation layer and a top surface of the metal layer region defines a continuous planar surface. An under bump metallurgy structure, sized and positioned to completely overlay the top surface of the metal layer region, is coupled to the continuous planar surface. The under bump metallurgy structure is coupled to a bump termination electrode. Preferably, a top surface of the bump termination electrode has a maximum surface nonuniformity of less than about 1 micron.

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