PLA microcode controller

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Details

364900, G06F 100

Patent

active

050438794

ABSTRACT:
To provide for efficient use of computer microcodes, a firmware structure containing a mainline programmable logic array circuit and at least one subroutine programmable logic array circuit may be used. As the states of the mainline programmable logic array circuit are sequenced, the data bits representing the encode number field in its OR array are compared with the data bits representing the encode number field of the AND array of the subroutine programmable logic array circuit. If a match is made, the mainline programmable logic array circuit suspends its operation and sequencing of the subroutine programmable logic array circuit begins, in order to perform the function required. Upon completion of the function, control is automatically transferred from the subroutine programmable logic array circuit back to the mainline programmable logic array circuit, at the point where it was suspended. By nesting a plurality of subroutine programmable logic array circuits, a plurality of functions, many of which may be performed simultaneously, can take place.

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