Pla dac circuit employing a test function

Coded data generation or conversion – Converter calibration or testing

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Details

341144, H03M 110

Patent

active

058700439

ABSTRACT:
In a PLA DAC circuit, it renders output of output-characteristic independent of method of establishment of PLA possible. Test terminal TEST is added to input terminal IN, causing combination of normal digital signal and test signal to judge at logical operation circuit. Switching circuit functioning during test is provided between PLA 2 and constant current source circuit, thus controlling the switching circuit by the logical operation circuit. Under the normal condition, it causes PLA 2 to function as ROM of the DAC circuit, while under the test condition, it causes the PLA 2 to perform through by operation of the switch circuit so that output of each of current sources I1-I3 is capable of being controlled independently regardless of any establishment of PLA 2.

REFERENCES:
patent: 5583502 (1996-12-01), Takeuchi et al.

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