Pixel structure

Details Pixel structure Pixel structure

2005-09-06

2005-09-06

Osorio, Ricardo (Department: 2673)

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

C349S114000, C349S043000

Reexamination Certificate

active

06940480

ABSTRACT:
A pixel structure on a substrate is provided. The pixel structure includes a scan line, a gate dielectric layer, a data line, a passivation layer, a transparent pixel electrode and a double drain thin film transistor (double drain TFT). The scan line is positioned over the substrate and the gate dielectric layer is positioned over the substrate covering the scan line. The data line is positioned over the gate dielectric layer. The data line extends in a direction different from the scan line. The passivation layer is positioned over the gate dielectric layer covering the data line. The transparent pixel electrode is positioned over the passivation. The double drain TFT is positioned over the substrate in the middle of the pixel structure. The double drain TFT has a gate, a channel layer, a source and two drains. The source and the data line are electrically connected. The two drains are electrically connected to transparent pixel electrode. The channel layer is positioned over the gate dielectric layer above the gate. The gate and the scan line are electrically connected.

REFERENCES:
patent: 5789762 (1998-08-01), Koyama et al.
patent: 6166786 (2000-12-01), Ohkubo et al.
patent: 6388653 (2002-05-01), Goto et al.
patent: 6773971 (2004-08-01), Zhang et al.
patent: 6819385 (2004-11-01), Lu
patent: 2003/0089910 (2003-05-01), Inukai

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