Pixel engine pipeline for a 3D graphics accelerator

Details Pixel engine pipeline for a 3D graphics accelerator Pixel engine pipeline for a 3D graphics accelerator

1996-03-15

1998-06-16

Buchel, Jr., Rudolph J.

Computer graphics processing and selective visual display system

Computer graphics processing

Three-dimension

345503, G06F 1200

Patent

active

057678561

ABSTRACT:
A pixel engine pipeline (including a "front-end" and a "back-end") communicates pixel information between a graphics processor, a pixel engine, a data cache, and system memory. The "front-end" (for reading requested data) includes a command queue for receiving graphics instructions from a graphics processor. Read requests in the command queue are stored in a read request queue. Extraction instructions corresponding to at least a portion of the read request are stored in an attribute queue. Control logic determines whether the requested data is located in a data cache. The read request is stored in a load request queue and the requested data is retrieved from system memory into a load data queue, if the requested data is not in the data cache. The control logic stores the requested data into a read data queue. The requested data is provided to a stage of the pixel engine from the read data queue in accordance with the extraction instructions. A "back-end" (for writing graphics information to system memory) of the pixel engine pipeline includes a write data queue receiving write data from the pixel engine, wherein the write data includes pixel information interleaved with Z information. A first accumulation buffer is used to accumulate pixel information. A second accumulation buffer is used to accumulate Z information. A multiplexer selects a selected buffer from one of the first and second accumulation buffers. The selected buffer is written to a store buffer for subsequent writing to system memory.

REFERENCES:
patent: 4831581 (1989-05-01), Rubinfeld
patent: 5001469 (1991-03-01), Pappas et al.
patent: 5023776 (1991-06-01), Gregor
patent: 5043921 (1991-08-01), Gonzalez-Lopez et al.
patent: 5056044 (1991-10-01), Frederickson et al.
patent: 5268995 (1993-12-01), Diefendorff et al.
patent: 5367632 (1994-11-01), Bowen et al.
patent: 5423016 (1995-06-01), Tsuchiya et al.
patent: 5430888 (1995-07-01), Witek et al.
patent: 5528738 (1996-06-01), Sfarti et al.
patent: 5543824 (1996-08-01), Priem et al.
patent: 5544306 (1996-08-01), Deering et al.
patent: 5594854 (1997-01-01), Baldwin et al.
patent: 5621866 (1997-04-01), Murata et al.
Haeberli and Akeley, "The Accumulation Buffer: Hardware Suport forHigh Quality Rendering", ACM Computer Graphics, vol. 24, No. 4, Aug. 1990, pp. 309-318.

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