Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2011-06-28
2011-06-28
Shankar, Vijay (Department: 2629)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S211000, C345S212000
Reexamination Certificate
active
07969391
ABSTRACT:
A pixel circuit including: a driving transistor; a light emitting element; and a power supply line; wherein the driving transistor is connected between the power supply line and a predetermined electrode of the light emitting element, and the power supply line is formed as multilayer wiring, and an interpolating capacitance is formed such that the power supply line formed as the multilayer wiring and another conductive layer are opposed to each other at a distance.
REFERENCES:
patent: 2006/0279478 (2006-12-01), Ikegami
patent: 2008/0068359 (2008-03-01), Yoshida et al.
patent: 08-234683 (1996-09-01), None
patent: 2003-271095 (2003-09-01), None
patent: 2003-330387 (2003-11-01), None
patent: 2006-148040 (2006-06-01), None
patent: 2006-276143 (2006-10-01), None
patent: WO-2006/090560 (2006-08-01), None
Japanese Office Action issued Dec. 2, 2008 for corresponding Japanese Application No. 2006-311493.
Iida Yukihito
Uchino Katsuhide
Rader & Fishman & Grauer, PLLC
Shankar Vijay
Sony Corporation
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