Pixel cell voltage control and simplified circuit for prior...

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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Details

C345S099000, C345S204000, C345S090000

Reexamination Certificate

active

07088329

ABSTRACT:
The present invention discloses a pixel display configuration by providing a voltage controller in each pixel control circuit for controlling the voltage inputted to the pixel electrodes. The controller includes a function of multiplexing the voltage input to the pixel electrodes and also a bit buffering and decoupling function to decouple and flexible change the input voltage level to the pixel electrodes. The controller further a delay element connected to the first and second switching stages for delaying a turning on of one stage after a turning off of another stage with sufficient delay for loading a predefined set of display data for preventing turning on of both said first and second switching stages. The rate of DC balancing can be increased to one KHz and higher to mitigate the possibility of DC offset effects and the image sticking problems caused by slow DC balancing rates. This invention further discloses an enabling technology for switching from one DC balance state to another without rewriting the data onto the panels. Therefore, it is not required to implement a high voltage CMOS designs and standard CMOS technologies can be applied to manufacture the storage cells and control panel for the LCOS displays with lower production cost and higher yields.

REFERENCES:
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patent: 5926158 (1999-07-01), Yoneda et al.
patent: 5945972 (1999-08-01), Okumura et al.
patent: 5959598 (1999-09-01), McKnight
patent: 6005558 (1999-12-01), Hudson et al.
patent: 6262703 (2001-07-01), Perner
patent: 6456267 (2002-09-01), Sato et al.
patent: 6731306 (2004-05-01), Booth et al.
patent: 2004/0125090 (2004-07-01), Hudson

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