Pipelined single chip microprocessor having on-chip cache and on

Details Pipelined single chip microprocessor having on-chip cache and on Pipelined single chip microprocessor having on-chip cache and on

1984-07-03

1988-12-27

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 900

Patent

active

047945249

ABSTRACT:
A 32-bit central processing unit having a six-stage pipeline architecture with a cache memory and memory management unit all provided on a single integrated circuit (I.C.) chip but without any peripheral interface input/output circuits, clock or similar circuits on the chip in order to utilize the limited I.C. area for implementing the processor functions that most directly affect speed of operation and other performance factors.

REFERENCES:
patent: 4521851 (1985-06-01), Trubisky
"Z80 Memory Expansion for the Z800-Application Note", Mar. 1983, Zilog Inc.
"Zilog Z800 8/16-Bit Microprocessor Family", Zilog Press Release, Apr. 25, 1983.
"8- and 16-Bit Processor Family Keeps Pace with Fast RAM's", Carter et al., Electronic Design, Apr. 1983.
"Z800 Expands Z80 Instruction Set", Jasper et al., Electronic Product Design, May 1983.
"Powerful 32-Bit Micro Includes Memory Management", Alpert, Computer Design, Oct. 1983, p. 213.
"On-Chip Memory Management Comes to 8-Bit MP", Whitcomb, Electronic Design, Oct. 14, 1982.
"Z8108 Advanced Information Bulletin", Oct. 1982, Zilog Inc.
"Expanding the Z80's Memory", L. Nyugen, Computer Design, Oct. 1982.
"MC68020 32-Bit Microprocessor User's Manual", 1984, by Prentice-Hall, Inc.
"32-Bit Processor Chip Integrates Major System Functions", Alpert et al., Electronics, Jul. 14, 1983, p. 113.
"Preliminary Product Specification", Zilog Inc., Sep. 1983.
"Z80,000 32-Bit Microprocessor", Yamamura et al., presented at Weston, Oct. 1983.

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