Pipelined processor with fork, join, and start instructions usin

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395650, 395800, 364230, 3642318, 3642624, 3642629, 364263, 3642631, 36423293, 364DIG1, G06F 930, G06F 938

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054993490

ABSTRACT:
A multithreaded parallel data processing system has at least one processing element for processing multiple threads of computation. Threads are described by thread descriptors or tokens which are stored while waiting to be processed in a thread descriptor storage. Thread descriptors are comprised of an instruction pointer and a frame pointer. The instruction pointer points to the next instruction to be executed, and the frame pointer points to a frame of memory locations that the next instruction will operate on. Included within the instruction set of the at least one processing element is a fork instruction generates two thread descriptors which are added to the current thread descriptors, a start instruction on a first processor sends a message containing a thread descriptor to a second processor, and a join instruction joins two threads by producing a single thread descriptor when both of the joining threads have reached a join instruction.

REFERENCES:
patent: 3614745 (1971-10-01), Podvin et al.
patent: 4229790 (1980-10-01), Gilliland et al.
patent: 4481573 (1984-11-01), Fukunaga et al.
patent: 4530051 (1985-07-01), Johnson et al.
patent: 4819155 (1989-04-01), Wulf et al.
patent: 4858105 (1989-08-01), Kuriyama et al.
patent: 4943908 (1990-07-01), Emma et al.
patent: 5050068 (1991-09-01), Dollas et al.
patent: 5050070 (1991-09-01), Chastain et al.
patent: 5226131 (1993-07-01), Graffe et al.
patent: 5241635 (1993-08-01), Papadopoulos et al.
Kowalik, J. S., "Parallel MIMD Computation: The HEP Supercomputer and its Applications," MIT Press, pp. 4-9.
Iannucci, Robert A., "Toward A Dataflow/Von Neumann Hybrid Architecture," Conference Proceedings of 15th Annual International Symposium on Computer Architecture, 30 May-2 Jun. 1988, Hawaii, IEEE, pp. 131-140.
Buehrer, Richard et al., "Incorporating Data Flow Ideas into von Neumann Processors for Parallel Execution", IEEE Transactions on Computers, vol. C-36, No. 12, Dec. 1987, pp. 1515-1522.
Patton, "Software Opens the Way to True Concurrency for Multiprocessing", Electronic Design, V33, Aug. 1985, p. 83+.
Preiss, Bruno R. et al., "Semi-Static Dataflow," Proceedings of the 1988 International Conference on Parallel Processing, 15-19 Aug. 1988, vol. II Software, Pennsylvania State University Press, pp. 127-134.
Nikhil, Rishiyur et al., "Can dataflow subsume von Neumann computing?" Computer Architecture Conference Proceedings, vol. 17 No. 3, Jun. 1989, Washington, pp. 262-272.
Halstead, R. H., Jr. et al., "M.A.S.A.: A Multithreaded Processor Architecture for Parallel Symbolic Computing," Conference Proceedings of the 15th Annual International Symposium on Computer Architecture, May 30-Jun. 2, 1988, Honolulu, Hawaii, IEEE, pp. 443-451.

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