Pipelined parallel vector processor including parallel configure

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36423221, 364736, G06F 1516

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049673432

ABSTRACT:
A pipelined parallel vector processor is disclosed. In order to increase the performance of the parallel vector processor, the present invention decreases the time required to process a pair of vectors stored in a pair of vector registers. The vector registers are subdivided into a plurality of smaller registers. A vector, stored in a vector register, comprises N elements; however, each of the smaller registers store M elements of the vector, where M is less than N. An element processor, functioning in a pipeline mode, is associated with each smaller register for processing the M elements of the vectors stored in the smaller register and generating results of the processing, the results being stored in one of the vector registers. The smaller registers of the vector registers, and their corresponding element processors, are structurally configured in a parallel fashion. The element processors and their associated smaller registers operate simultaneously. Consequently, processing of the N element vectors, stored in the vector registers, is complete in the time required to complete the processing of the M elements of the N element vector.

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