Pipelined microprogrammed digital data processor employing micro

Details Pipelined microprogrammed digital data processor employing micro Pipelined microprogrammed digital data processor employing micro

1980-05-06

1985-01-08

Springborn, Harvey E.

Boots, shoes, and leggings

G06F 928

Patent

active

044930194

ABSTRACT:
A pipelined microprogrammed data processing system is provided having a three-stage pipelined architecture implemented so as to in effect provide for the execution of a plurality of microinstructions using three separate processors operating 120 degrees out of phase with one another and sharing the same physical hardware. Synchronized microinstruction tasking and dynamic resource allocation are also provided in the system to provide both multiprogramming and multiprocessing on a microinstruction level.

REFERENCES:
patent: 3886523 (1975-05-01), Ferguson et al.
patent: 4110822 (1978-08-01), Porter et al.
patent: 4149242 (1979-04-01), Pirz
Microprogramming-Another Look at Internal Computer Control--M. J. Flynn, IEEE Proc. vol. 63, No. 11, Nov. 1975, pp. 1554-1567.
Microprogramming: A Tutorial and Survey of Recent Developments-Rauscher et al., IEEE Trans. on Computers, vol. C--29, No. 1, Jan. 1980.
The Microprogramming of Pipelined Processors--P. M. Kogge, 4th Annual Symposium on Computer Architecture, Mar. 1977, pp. 63-69.
A Pipeline Architecture Oriented Towards Efficient Multitasking--F. Romani, Euromicro, Oct. 1976, vol. 2, No. 4, North Holland Pub. Co., Amsterdam.
Stack Computers, Bulman et al., Computer, 5/77, pp. 14-15.
Stack Computers: An Introduction, Bulman et al., Computer, 5/77, pp. 18-28.
Exploring a Stack Architecture, Blake et al., Computer 5/77, pp. 30-39.
Semantic Structures for Efficient Code Generation in a Stack Machine, Couch et al., Computer, 5/77, pp. 42-48.
Stack Machine Development: Australia, Great Britain and Europe, F. G. Duncan, Univ. of Bristol, Computer, 5/77, pp. 50-52.

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