Pipelined floating point stores

Details Pipelined floating point stores Pipelined floating point stores

1998-02-19

2000-04-11

Eng, David Y.

Electrical computers and digital processing systems: processing

Processing architecture

Data driven or demand driven processor

G06F 930

Patent

active

060498609

ABSTRACT:
A floating point unit has a control unit, a data input register and a write stage register from which an instruction is transferred from the floating point unit to a storage unit. The floating point unit typically has multiple pipeline stages for arithmetic computation, a normalization stage, and a rounding stage, each of which pipeline stages may during processing of a stream of instructions contain a separate instruction. The stages are connected in an ordered manner such that the processing of instructions occurs in the pipeline. An active instruction is a "stalled" instruction within a pipeline when forward progress is not permitted to advance to a new stage in the pipeline because data needed is not available for a prior instruction creating a data dependency. A data dependent floating point store instruction is allowed, nevertheless, to progress in the pipeline even though its data is dependent on a previous instruction whose execution has not yet completed by providing intermediate result data from a previous instruction, and providing a forwarding path for the said data dependent floating point store instruction to skip stages in the floating point pipeline.

REFERENCES:
patent: 5051940 (1991-09-01), Vassilliadis et al.
patent: 5361345 (1994-11-01), English
patent: 5471593 (1995-11-01), Branigin
"Parallel Structure For High Performance Floating Point Processor" IBM Technical Disclosure Bulletin, J. R. Rodriguez, vol. 30, No. 9, Feb. 1988, pp. 411-413.

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