Pipelined floating point processing unit

Details Pipelined floating point processing unit Pipelined floating point processing unit

1990-04-02

1991-10-01

Shaw, Dale M.

Boots, shoes, and leggings

364736, G06F 738

Patent

active

050536311

ABSTRACT:
A floating point processor for pipelining a series of calculations of simple and compound arithmetic operations includes at least one arithmetic operation unit for performing arithmetic operations on input operands provided to the arithmetic operation units and at least one accumulator for storing the results of the arithmetic operations performed by the arithmetic operation unit. The results stored in the accumulators are then provided to the arithmetic operation units. Arithmetic operations are pipelined through the floating point processor by a series of latches which sequence the input operands, results produced by the arithmetic operation units using the input operands, and results produced by the arithmetic operation units using the input operands and the accumulated operands.

REFERENCES:
patent: 4075704 (1978-02-01), O'Leary
patent: 4589067 (1986-05-01), Porter et al.
patent: 4683547 (1987-07-01), DeGroot
patent: 4766564 (1988-08-01), DeGroot

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