Pipelined buffer for analog signal and power supply

Details Pipelined buffer for analog signal and power supply Pipelined buffer for analog signal and power supply

1992-03-23

1994-01-18

Sikes, William L.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307554, 307451, 307494, 307475, 307546, 307548, H03K 19086

Patent

active

052802000

ABSTRACT:
The analog dynamic superbuffer comprises the level shift stage, voltage clamping stage and the dynamic buffer stage. The clamping circuit enables the output buffer having the dynamic driving capability to drive a very large output load with very little static DC bias power consumption.
The TTL power supply is constituted of the stages of TTL power level shift and the analog superbuffer. The huge impact of the power source load is completely blocked by the analog superbuffer.

REFERENCES:
patent: 4783607 (1988-11-01), Hsieh
patent: 4789799 (1988-12-01), Taylor et al.
patent: 4820937 (1989-04-01), Hsieh
patent: 4849659 (1989-07-01), West
patent: 4849708 (1989-07-01), Brehmer et al.
patent: 4859878 (1989-08-01), Murayama
patent: 4914324 (1990-04-01), Goto
patent: 4924116 (1990-05-01), Vu et al.
patent: 5013941 (1991-05-01), Jansson

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