Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Reexamination Certificate
2001-05-16
2003-01-14
Tokar, Michael (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
C341S155000, C341S156000, C341S158000, C341S162000, C341S161000, C341S172000, C341S163000, C341S137000, C341S143000, C341S144000, C341S116000
Reexamination Certificate
active
06507305
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to analog-to-digital converters (ADCs).
2. Description of the Related Art
There are two large families of analog-to-digital converters: broad band ADCs (several MHz) with medium resolution (up to 10 significant bits), and narrow band ADCs (a few kHz) with high resolution (up to 16 bits and more).
Pipelined analog-to-digital conversion and &Dgr;&Sgr; modulation are to be found in numerous techniques known in the field of analog-to-digital conversion. Pipelined ADCs generally have a broad passband (several MHz) and medium resolution: of the order of 8 to 10 significant bits. In contrast, &Dgr;&Sgr; modulators are used to convert signals with high resolution (up to 16 bits and more) but over a frequency band that is generally narrow (a few kHz).
A pipelined converter comprises individual analog-to-digital conversion stages which are disposed in a pipeline. Each stage of the pipeline provides a number of bits which contribute to digitally encoding the signal. The operating principle of a pipeline stage consists in digitizing its input signal on a small number of bits by means of a flash type converter. Thereafter the digital code is converted back into an analog signal prior to being subtracted from the input signal (see FIG.
1
). The resulting difference is referred to as the “residue”. Each stage of the pipeline processes the residue of the preceding stage (except for the first stage which receives the input signal), and delivers a new residue to the following stage.
The precision of the components used limit the number of stages and the resolution of a pipelined analog-to-digital converter. However that technique has the advantage of a conversion bandwidth that can be as great as several MHz.
A &Dgr;&Sgr; analog-to-digital converter comprises a &Dgr;&Sgr; modulator followed by a decimator. The &Dgr;&Sgr; modulator oversamples the input signal and rejects quantization noise to outside the working bandwidth. The decimator operates in the digital domain to filter out the shaped quantization noise and reduces the output signal rate to the Nyquist frequency.
Because of the oversampling and the quantization noise shaping, &Dgr;&Sgr; modulation makes it possible to achieve high performance. However the conversion bandwidth is generally limited to a few kHz.
SUMMARY OF THE INVENTION
The object of the present invention is to propose an analog-to-digital converter that has high resolution over a selected frequency band while nevertheless retaining acceptable performance outside the selected band.
According to the invention, this object is achieved by an analog-to-digital converter including a first module of the type comprising a series of processor stages, each of said stages performing two conversions of the signal output by the preceding stage, firstly an analog-to-digital conversion and secondly a digital-to-analog conversion, followed by subtracting the signal obtained in this way from the output signal of the preceding stage to provide the analog output signal of said stage, said first module further including means for assembling together the signals digitized by each stage so as to provide an assembled digital signal which represents the input signal of the converter in digital form, the converter being characterized in that it further includes a &Dgr;&Sgr; modulator which digitizes the output signal from one of said stages, and means for subtracting the signal as digitized in this way from said assembled digital signal.
According to the invention this object is also achieved by a method of performing analog-to-digital conversion on an input signal to obtain an output signal in which a series of processing steps are performed, in each of which two conversions are performed on a result signal from the preceding step, firstly an analog-to-digital conversion and then a digital-to-analog conversion, followed by subtraction of the analog signal obtained in this way from the result signal of the preceding step to supply the result signal of the current step, in which method the signals digitized at each step are assembled together to form an assembled digital signal which represents the input signal in digital form, the method being characterized in that the result signal of one of said steps is also digitized by means of a &Dgr;&Sgr; modulator and this digitized signal is subtracted from said assembled digital signal.
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Brooks et al.; A Cascaded Sigma-Delta Pipeline A/D Converter with 1.25 MHz Signal Bandwidth and 89 dB SNR; IEEE Journal of Solid-State Circuits, vol. 32, No. 12, 1997 XP-000767440; pp. 1896-1906.
Andre Eric
Paillardet Frederic
Jacobson & Holman PLLC
Mai Lam T.
STMicroelectronics S.A.
Tokar Michael
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