Pipeline processing system and method

Details Pipeline processing system and method Pipeline processing system and method

1999-12-21

2002-10-08

Tung, Kee M. (Department: 2671)

Computer graphics processing and selective visual display system

Computer graphic processing system

Plural graphics processors

C345S522000

Reexamination Certificate

active

06462743

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention relates generally to three-dimensional graphics processing, and in particular to a pipeline processing system and method.
BACKGROUND OF THE INVENTION
In computer graphics, the surfaces of 3-D objects are approximated using polygons (typically triangles). Using smaller polygons creates more realistic 3-D objects on the computer screens. However, using smaller polygons requires a larger number of polygons to represent an object.
Surfaces of objects and the polygons representing the surfaces are provided in a three dimensional coordinate system, typically referred to as “object space” O(x, y, z). However, graphical displays used with computers and consumer video equipment are only two dimensional. Therefore, an image of the objects is displayed on a graphical display by projecting the object onto a two-dimensional coordinate system, typically referred to as “screen space” S(x, y).
Generally, a polygon can be described by the polygon's vertices. Typically the description of a vertex includes the coordinates of the vertex in object space, i.e. (x, y, z); perspective projection parameters (w, s, t); the color of the vertex, typically using color space coordinates (r, g, b); an alpha parameter; and a fog parameter. The vertex information is processed through well known setup processes into a parameter list suitable for a 3-D pipeline. The exact parameter list format depends on the 3-D pipeline used.
The 3-D pipeline performs rasterization of the polygons, i.e. the conversion of polygons into pixels in screen space. A common rasterization algorithm for polygons includes four major steps: walk edges, walk spans, compute texture coordinates, and compute fog value. Many elements of the theory and techniques of rasterization are known to those skilled in the art.
Texturing pixels is a technique for mapping an image (“texture”) onto the polygonal surfaces of a computer-generated object, so as to allow the object to appear more realistic in a displayed scene. Texture mapping allows a texture to be superimposed onto each polygon of an object, using transformation techniques that compensate the appearance of the texture in each polygon for lighting conditions, angles of viewing and other conditions which may affect the appearance of the object. Many elements of the theory and techniques of texture mapping are known to those skilled in the art.
As screen space pixels are generated by rasterization, the screen space pixels are blended in a blender or back end processor to create 2-D images suitable for graphic displays. Specifically, the blender or back end processor performs Z-buffering and alpha blending on the screen space pixels. Z-Buffering determines which screen space pixels can be seen on the graphics screen. Specifically, z-buffering compares the z-coordinate of each screen space pixel against the z-coordinate of the screen space pixel with the same x- and y-coordinates already in the frame buffer. If the screen space pixel is in front of the frame buffer pixel, the parameters of the screen space pixel is stored in the frame buffer; otherwise the contents of the frame buffer remain unchanged. The frame buffer is typically addressed by mapping the x and y coordinates of a pixel into a memory address. The frame buffer stores parameters regarding the pixel such as color space values and the z-coordinate. Alpha blending controls the translucence of overlaid surfaces. The screen space pixels are stored in a frame buffer for displaying on a graphics display. Many elements of the theory and techniques of z-buffering and alpha blending are known to those skilled in the art.
For realistic 3-D graphics, a 3-D image may include thousands of polygons for real-time applications or even millions of polygons for high-resolution 3-D images. Since many calculations are required to render each polygon, a high-quality image can consume a large amount of processor time. Thus, performance and image quality are often competing considerations due to the limited processing speeds available. Any decrease in the processing time required to render an image component polygon is desirable, since it enables either higher-quality graphics to be produced at a given frame rate or faster rendering of a given image.
SUMMARY OF THE INVENTION
Therefore, a need has arisen for a three-dimensional graphics processing system that addresses the disadvantages and deficiencies of the prior art. In particular, a need has arisen for a pipeline processing system with enhanced efficiency.
Accordingly, a novel pipeline processing system is disclosed. In one embodiment, the pipeline processing system includes a parameter bus and a command processor. The command processor receives a command, generates a word in response to the command, and transmits the word on the parameter bus. The word includes information identifying whether the word includes state parameter data and information identifying whether the word includes immediate mode parameter data. A plurality of pipeline stages are positioned along the parameter bus. Each pipeline stage has a state register and a logic block both connected to the parameter bus. The state register receives the word and stores the state parameter data included in the word in response to the information identifying whether the word includes state parameter data. The logic block receives the word and performs a logic operation using state parameter data stored in the state register and the immediate mode parameter data included in the word in response to the information identifying whether the word includes immediate mode parameter data.
An advantage of the present invention is that state parameter changes may be effected in the pipeline using the same parameter bus as is used for carrying other data. Another advantage of the present invention is that state parameter changes may be effected in the pipeline without first draining the pipeline of existing data.


REFERENCES:
patent: 6169554 (2001-01-01), Deering
patent: 6208361 (2001-03-01), Gossett

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