Pipeline architecture for the design of a single-stage...

Details Pipeline architecture for the design of a single-stage... Pipeline architecture for the design of a single-stage...

2007-05-01

2007-05-01

To, Doris H. (Department: 2616)

Multiplex communications

Pathfinding or routing

Through a circuit switch

C370S369000, C370S375000, C370S387000, C370S388000

Reexamination Certificate

active

10401282

ABSTRACT:
An architecture for a high bandwidth digital cross-connect switching system that is internally non-blocking, has a simpler layout, and employs a reduced number of logic gates. The high bandwidth digital cross-connect switching architecture comprises a Time Division Multiplexing (TDM) cross-connect including M space/time switches. Each space/time switch includes an input bus, an output bus, N×W Flip-Flops (FFs) for storing input data, W N-by-N switches for sorting the data according to predetermined cross-connection requirements, and N×W FFs for storing output data, in which “N” corresponds to the number of input ports and the number of output ports in the N-by-N switch, and “W” corresponds to the width of each data word. Each N-by-N switch includes N×W N-to-1 selectors, and the M space/time switches include N×W M-to-1 selectors, thereby allowing an effective N×M-to-1 selection to be performed on the data words.

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Creating Large Switch Fabrics using the Three-Stage(Clos)Architecture; Ian Kyles, Vitesse Semiconductor Corporation, pp. 1-12.

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