Pipeline analog-to-digital conversion that reduces the accumulat

Details Pipeline analog-to-digital conversion that reduces the accumulat Pipeline analog-to-digital conversion that reduces the accumulat

1997-12-15

2000-02-22

Williams, Howard L.

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

341155, H03M 138

Patent

active

06028546&

ABSTRACT:
Pipeline A/D-conversion of an analog input signal is performed according to a new and inventive algorithm which generates a Gray coded digital output signal. A pipeline A/D-converter comprises a number of cascaded stages through which the analog input signal is propagated. Each stage generally generates an output bit of the digital output signal, and furthermore processes the pipeline signal. According to the inventive Gray coding algorithm, the output bit generated in a stage determines whether or not the pipeline signal of that stage is inverted. In a pipeline A/D-converter based on the Gray coding algorithm according to the invention, the accumulation of offset errors will generally be very low. Furthermore, the fact that the signal inversion is digitally controlled enables high precision implementations which further improve the performance of the inventive pipeline A/D-converter. In another embodiment of the invention, the Gray coding algorithm is modified to form a second algorithm which makes low device count implementations possible.

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van de Plassche, R.J. et al., "A High-Speed 7 Bit Converter" IEEE Journal of Solid-State Circuits, vol. SC-14, No. 6, Dec. 1979.

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