Pipeline A/D converter and method of pipeline A/D conversion

Details Pipeline A/D converter and method of pipeline A/D conversion Pipeline A/D converter and method of pipeline A/D conversion

2008-03-25

2008-03-25

JeanPierre, Peguy (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

C341S144000, C341S155000

Reexamination Certificate

active

11479011

ABSTRACT:
A pipeline A/D converter of the present invention includes a plurality of stages each operating for A/D conversion and a digital computing portion that outputs an A/D converted signal based on a digital signal output from each of the stages. In each of the stages, an analog signal from the preceding stage is sampled by passive elements C1and C2in a first period, and one of the passive elements is used as a feedback element in a second period to perform adding/subtracting with respect to the signal sampled by the other passive element. By the control from the digital computing portion, a test signal Tink is used instead of an analog output signal Vo(k−1), and a unique conversion-error value is detected and corrected based on the digital signal obtained by the operation of each of the stages. It is possible to obtain a high-resolution A/D convert that can suppress a conversion error caused by the relative error of capacitors used for analog signal processing without decreasing the speed of A/D conversion.

REFERENCES:
patent: 6642871 (2003-11-01), Takeyabu et al.
patent: 6700524 (2004-03-01), Naka et al.
patent: 2006/0044173 (2006-03-01), Dosho et al.
patent: 2001-352242 (2001-12-01), None
Yang et al., “A 3-V 340-mW 14-b 75 Msample/s CMOS ADC With 85-dB SFDR at Nyquist Input” IEEE Journal of Solid-State Circuits, vol. 36, No. 12, Dec. 2001, pp. 1931-1936.

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