Pin photodiode having a wide bandwidth

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Light responsive structure

Reexamination Certificate

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Details

C257S185000, C257S458000, C257S464000, C438S093000, C438S094000

Reexamination Certificate

active

06326649

ABSTRACT:

FIELD OF THE INVENTION
The invention relates generally to PIN photodiodes. More particularly, the invention relates PIN photodiodes having wide bandwidths.
BACKGROUND OF THE INVENTION
Fiber optic communications typically employ a modulated light source, such as a laser, a photodiode light detector, and an optical fiber interconnecting the laser and the photodiode. The laser typically is modulated to emit light pulses, which are to be received by remote photodiodes and converted into electrical signal outputs by the photodiodes.
Conventional photodiodes typically are arranged as PIN type photodiodes.
FIG. 1
shows a common PIN photodiode
10
of the prior art. As shown in this figure, the photodiode
10
is constructed as a chip having three semiconductor regions: a p region
12
, an n region
14
, and an intermediate i (intrinsic) region
16
. The p and n regions
12
and
14
normally are doped to high carrier concentrations while the i region
16
typically is unintentionally doped to have a small, residual p or n type carrier concentration. A p contact
18
, or anode, is connected to the p region
12
and an n contact
20
, or cathode, is connected to the n region
14
. Normally, the p region
12
is coated with a dielectric coating
22
which prevents surface current leakage around the sides of the device and also serves as anti-reflective coating if the device is illuminated from the top side. The n region
14
is coated with an antireflective coating
24
which prevents reflection of the incident light away from the device. In some arrangements, a thin buffer coating (not shown) on the order of 0.1 &mgr;m to 0.2 &mgr;m is placed between the n region
14
and the i region
16
to prevent diffusion therebetween and avoid inadvertent doping of the i region.
PIN photodiodes such as that shown in
FIG. 1
are negatively biased such that the entire i region
16
is depleted and substantially no current flows through the device under dark conditions. When incident light, for example light exiting an optical fiber, passes through either the transparent p region
12
or the transparent n region
14
, it is absorbed by the i region
16
and the photons of light, hv, are converted into electron-hole pairs which create a net current flow through the photodiode
10
.
A high performance photodiode must meet the speed requirements of high-bit-rate systems and must be efficient in converting optical signals at the operating frequencies to electrical signal current. Presently, high-bit-rate systems typically operate in the 10 Ghz to 20 Ghz frequency range. To meet the speed requirements of such systems, the photodiode used must have an adequately wide bandwidth. To operate at this wide bandwidth, the photodiode must be configured so as to minimize device capacitance. In particular, the capacitance of the pn junction, C
j
, must be minimized. The junction capacitance can be calculated by the mathematical expression C
j
=&egr;A/W, where &egr; is the dielectric permittivity, A is the junction area, and W is the depletion region thickness. In keeping with this expression, previous attempts at minimizing device capacitance have focused on minimizing the junction area, A, and reducing the unintentional doping of the i region. Although an effective means of reducing capacitance, junction area minimization creates difficulties with optical fiber/photodiode alignment. Misalignment of the optical fiber with the photodiode can result in part or all of the optical signals not being absorbed in the i region of the photodiode, reducing the optical to electrical conversion efficiency and generating tails on the pulses resulting in a bandwidth reduction.
From the above expression, it is apparent that increasing the depletion region thickness, W, is another means of reducing capacitance. This normally is accomplished by increasing the thickness of the i region which, as mentioned above typically is completely depleted by the negative bias applied to the photodiode. Although increasing i region thickness does effectively reduce capacitance of the photodiode, attempts to do so create manufacturing difficulties. In particular, it is difficult to grow relatively thick i regions composed of, for example, indium gallium arsenide (InGaAs) with high yield results.
SUMMARY OF THE INVENTION
Briefly described, the present invention is a PIN photodiode comprising a p region containing a p type dopant, an n region containing an n type dopant, an i region positioned intermediate the p region and the n region, and a relatively thick, undoped buffer region positioned between the n region and the i region which substantially decreases the capacitance of the PIN photodiode such that the photodiode bandwidth is maximized. Preferably, the buffer region is formed as a layer of indium phosphide that is at least approximately 0.5 &mgr;m in thickness. Most preferably, the buffer region has a thickness of approximately 0.5 &mgr;m to 2.5 &mgr;m, which is drastically greater than prior art buffer region thickness.
The invention further relates to a method for increasing the bandwidth of a PIN photodiode comprising a p region, an n layer, and an i layer intermediate the p region and the n layer, comprising the step of providing a relatively thick, undoped buffer layer between the n layer and the i layer, wherein the buffer layer substantially decreases the capacitance of the PIN photodiode such that the photodiode bandwidth is maximized.
The objects, features, and advantages of this invention will become apparent upon reading the following specification, when taken in conjunction with the accompanying drawings. It is intended that all such additional features and advantages be included therein with the scope of the present invention, as defined by the claims.


REFERENCES:
patent: 4183034 (1980-01-01), Burke et al.
patent: 4784702 (1988-11-01), Henri
patent: 4885622 (1989-12-01), Uchiyama et al.
patent: 4904608 (1990-02-01), Gentner et al.
patent: 4999696 (1991-03-01), Gentner et al.
patent: 5045908 (1991-09-01), Lebby
patent: 5304824 (1994-04-01), Tonai
patent: 5528071 (1996-06-01), Russell et al.
patent: 5557117 (1996-09-01), Matsuoka et al.
patent: 5682037 (1997-10-01), de Cesare et al.
patent: 5818096 (1998-10-01), Ishibashi et al.
patent: 5998806 (1999-12-01), Stiebig et al.

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