Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Patent
1997-04-16
1999-09-14
Hardy, David B.
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
257774, 257766, 257741, H01L 23532
Patent
active
059527161
ABSTRACT:
A pinning process including the steps of gold-plating through-holes in a laminate carrier and crimping a gold or gold-plated pin located in the through-holes to form a pin head on the top and a pin bulge on the bottom of the laminate carrier to produce a plastic pin grid array. A variety of mechanical forming processes may be employed to form the pin heads and pin bulges and cause the pin to at least partially, and preferably substantially, fill and contact the gold-plated through-hole including swage pinning, impact pinning, and double-die pinning operations. By combining the steps of gold-plating through-holes of a laminate carrier and using a mechanical pinning process to crimp a gold or gold-plated pin in the through-holes, a reliable mechanical and electrical connection may be established between the pin and the metal lines both inside and on the surface of the laminate carrier without the need for lead-containing solders and pastes.
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Dibble Eric P.
Laine Eric H.
MacQuarrie Stephen W.
Hardy David B.
International Business Machines - Corporation
Pivnichny John R.
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