Pin and status bus structure for an integrated circuit

Details Pin and status bus structure for an integrated circuit Pin and status bus structure for an integrated circuit

1995-11-13

1997-12-23

Harrity, John E.

Boots, shoes, and leggings

395306, 3642407, 364DIG1, G06F 1300

Patent

active

057014213

ABSTRACT:
I/O control modules (IOCMs 25-29) include pin/status buses (75-77) which allow simultaneity of control among the channels (e.g. 58) coupled to the same pin/status bus (e.g. 76). Thus, the operation of channels (e.g. 58) can be synchronized with each another. Pin/status buses (75-77) are modular in that they can be extended or alternately segmented to create separate buses carrying different signals. In one embodiment, each end of pin/status bus (75-77) is delineated by a pin control channel (PCCs 51-53). Pin/status buses (75-77) may be used to transfer event information between channels within an IOCM (e.g. IOCM 25), to transfer event information from one IOCM (e.g. 25) to a different IOCM (e.g. 26), and to transfer pin information between integrated circuit pins (31-35) and one or more channels in IOCMs (25-29).

REFERENCES:
patent: 3675209 (1972-07-01), Trost et al.
patent: 4821263 (1989-04-01), Lundh
patent: 4926319 (1990-05-01), Wilkie et al.
patent: 4942522 (1990-07-01), Wilkie et al.
patent: 4952367 (1990-08-01), Porter et al.
patent: 5042005 (1991-08-01), Miller et al.
patent: 5117498 (1992-05-01), Miller et al.
patent: 5129078 (1992-07-01), Groves et al.
Motorola Ltd. 1994 Reference Manual, "Modular Microcontroller Family-CTM-Configurable Timer Module", USA/EUROPE Motorola Lit. Distribution, pp. 1-1 thru 10-14 & Appendix A-D.
Motorola Ltd. 1994 Reference Manual, "Modular Microcontroller Family-TPU-Time Processor Unit" USA/EUROPE Motorola Lit.Distribution, pp. 1-1 thru 4-8 & Appendix A-D.
Intel Corp. Lit. Dept., Santa Clara, CA, "8096 16-Bit Microcontroller Architectural Specification & Functional Description, Advance Info.," pp. 1-21, 1983.
Hitachi, Ltd. 1987, "Hitachi Microcomputer System HD63140 Universal Pulse Processor (UPP)", Mar. 1987, pp. 1-55.

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