Piezoelectric transformer drive circuit and drive method

Electrical generator or motor structure – Non-dynamoelectric – Piezoelectric elements and devices

Reexamination Certificate

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Details

C310S318000

Reexamination Certificate

active

06208064

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a piezoelectric transformer circuit drive circuit and a piezoelectric transformer driving method. More particularly, the invention relates to a piezoelectric transformer circuit drive circuit and a piezoelectric transformer driving method taking a power source for a back-light of a display device employing a liquid crystal, as a load, or so forth.
2. Description of the Related Art
In general, a piezoelectric transformer is an element, in which primary side and secondary side electrodes are attached on a piezoelectric material to cause resonance of a transformer by applying a voltage of resonance frequency of the piezoelectric transformer on the primary side and to lead out a voltage generated by mechanical resonation on the secondary side. The piezoelectric transformer is characterized in capability of down-sizing and reduction of thickness in comparison with an electromagnetic transformer. Therefore, the piezoelectric transformer is an element attracting attention as a back-light power source for the display device employing a liquid crystal, or so forth.
The conventional drive circuit for a piezoelectric element of this type has been disclosed in Japanese Unexamined Patent Publication No. Heisei 9-107684. The disclosed drive circuit turns OFF a transistor in time division manner for interrupting an input voltage of the piezoelectric transformer for variably controlling a root-mean-square effective value of an alternating current or an alternating voltage to be supplied to the load which is connected to the piezoelectric transformer. The conventional drive circuit disclosed in the above-identified publication will be discussed with reference to FIG.
11
.
As shown in
FIG. 11
, the conventional drive circuit includes a transformer circuit
4
having a piezoelectric transformer
1
, in which a primary electrode
100
and a secondary electrode
200
are provided, a drive voltage control circuit
5
controlling a drive voltage for transforming, a frequency control circuit
3
for controlling a drive frequency, a dimmer circuit
6
for dimming when a load to be driven is a cold cathode tube.
In
FIG. 11
, the transformer circuit
4
drives the piezoelectric transformer
1
by resonating inductance and input capacitance of coils L
1
and L
2
of the piezoelectric transformer
1
and whereby generating a sine wave. Transistors Q
1
and Q
2
are alternately turned into ON state by clocks Vg
1
and Vg
2
of opposite phases output from a frequency divider circuit
8
to charge a current from a direct current power source VDD to the coils L
1
and L
2
as electromagnetic energy so that a voltage higher than the power source voltage can be generated as a voltage energy by discharging the charged energy upon turning OFF of the transistors Q
1
and Q
2
. A half-wave sine wave of mutually different phase equivalently act as sine weave to vibrate the piezoelectric transformer
1
to output an elevated alternating current voltage V
0
determined depending upon a shape of the piezoelectric transformer
1
from the secondary electrode
200
.
The alternating current voltage V
0
is applied to the load
2
. Then, an alternating current IO is input to the frequency control circuit
3
. The frequency control circuit
3
is a circuit performing a process for outputting a frequency data driving the piezoelectric transformer
1
to the frequency divider circuit
8
to continue sweeping of drive frequency until the alternating current IO fed back from the load reaches a predetermined value and for stopping the frequency, at which the predetermined value is obtained.
The frequency control circuit
3
is constructed with a current-voltage converting circuit
10
, a rectifier circuit
11
, a comparator
12
, an integrator circuit
13
, a comparator
14
and a voltage controlled oscillator (VCO)
15
. The alternating current IO is converted into a voltage signal by the current-voltage converting circuit
10
, rectified by the rectifier circuit
11
and then input to the comparator
12
as a detection signal. The comparator
12
compares the voltage of the detection signal with a reference voltage Vref. If the voltage of the detection signal is lower than the reference voltage Vref, a high level signal is output to the integration circuit
13
. The integrator circuit
13
is designed to lower an output voltage at a given rate during a period where the high level signal is input. The output voltage Vin of the integrator circuit
13
is input to the VCO
15
. From the VCO
15
, a triangular wave fVCO and a rectangular wave fCLK are output. The output waveforms of the VCO
15
are illustrated in FIG.
12
A(A). When a voltage Vin from the integrator circuit
13
is a minimum voltage value,
12
A(A) illustrates the output voltage waveform as the triangular wave fVCO and
12
A(B) illustrates the output voltage waveform as the rectangular wave fCLK. FIG.
12
A(C) is a voltage waveform chart, in which the rectangular wave fCLK is processed by frequency division by the frequency divider circuit
8
of the transformer circuit
4
to be Vg
1
. While not illustrated, a signal Vg
2
having opposite phase to the signal Vg
1
is also generated by the frequency divider circuit
8
. The frequency divider circuit
8
of the type, in which phases of the signal is reversed at the rising timing of fCLK, is premised. On the other hand, both of the triangular wave fVCO and the rectangular wave fCLK are set the frequencies thereof at a value double of the frequency for driving the piezoelectric transformer
1
. FIGS.
12
B(D),
12
B(E) and
12
B(F) respectively show fVCO. fCLK and Vg
1
in the case where the voltage Vin from the integrator circuit
13
is maximum, which fVCO, fCLK and Vg
1
are set for outputting higher frequency than those at the minimum voltage of Vin.
The reason why the output of the integrator circuit
13
is risen at a given rate to lower the output frequency of the VCO
15
in a period where the output of the comparator
12
is held high level, is to sweep the drive frequency from the high frequency side. The reason why sweeping the drive frequency from the high frequency side is to use the frequency region higher than the resonance frequency fr of the piezoelectric transformer
1
. Thus, the step-up ratio of the piezoelectric transformer
1
is increased to increase of magnitude of the alternating current Io in time. At this condition, if the voltage input to the comparator
12
exceeds the reference voltage Vref, the output of the comparator
12
becomes low level to cause termination of the integrating operation of the integrator circuit
13
. Thereafter, the output of the integrator circuit
13
is maintained at the immediately preceding voltage value. Accordingly, the frequency data output by the VCO
15
also becomes constant to drive the piezoelectric transformer at as constant drive frequency. Thus, the output of the piezoelectric transformer
1
is maintained constant.
When a direct current input voltage VDD less than a rated voltage is input to a piezoelectric transformer inverter or when a relatively long period is required to turn ON the cold cathode tube used in the load
2
, the predetermined alternating current Io cannot be supplied to the frequency control circuit
3
while the direct current is supplied to lower the output frequency of the VCO
15
to be lower than or equal to the resonance frequency. Therefore, when the direct current input voltage is elevated to be higher than or equal to the rated voltage or when the cold cathode tube of the load
2
is turned ON, the step-up ratio of the piezoelectric transformer becomes insufficient to continue a condition where the predetermined output cannot be supplied to the load
2
. Accordingly, when the drive frequency is lowered down to the minimum frequency of the VCO
15
, it becomes necessary to return the drive frequency to the maximum frequency of the VCO
15
. In this operation, when the output voltage of the integrator circuit
13
becomes l

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