Oscillators – Combined with particular output coupling network
Reexamination Certificate
2000-10-31
2002-11-12
Kinkead, Arnold (Department: 2817)
Oscillators
Combined with particular output coupling network
C331S1160FE, C331S1160FE, C331S158000, C331S03600C, C331S17700V
Reexamination Certificate
active
06480071
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a piezoelectric oscillator and an electronic device.
2. Description of Related Art
FIG. 12
is a block view of a piezoelectric oscillator used for an electronic device. As shown in
FIG. 12
, a piezoelectric oscillator
1
is made up of an oscillation stage
2
and an output stage
3
. As shown in
FIG. 12
, the piezoelectric oscillator is connected to a power supply
4
via a switch
5
.
As shown in
FIG. 13
, in the piezoelectric oscillator
1
, the oscillation stage
2
is a colpitts oscillation circuit consisting of a piezoelectric resonator X, an inverter INV
1
for oscillation, a feedback resistor Rf, a capacitor Cg on the gate side, and a capacitor Cd on the drain side, and the output stage
3
is an inverter INV
2
for output.
Specifically, the piezoelectric oscillator
1
outputs oscillation pulses P generated at the oscillation stage
2
through the output stage
3
to an external load to be connected to the piezoelectric oscillator
1
. Thus, oscillation stability is maintained by avoiding the frequency deviations of the oscillation pulses P caused by the external load. At the same time, oscillation pulses P can be amplified at the output stage
3
up to the level of driving the external load.
Moreover, in order to minimize the spurious modes of the oscillation pulses P, it is generally preferable to excite the piezoelectric resonator X by low driving power in a range in which oscillation can continue.
Subsequently, at the oscillation stage
2
of the piezoelectric oscillator
1
, the inverter INV
1
of the oscillation stage
2
restrains driving power.
On the other hand, at the output stage
3
of the piezoelectric oscillator
1
, there is a need to amplify the oscillation pulses P up to the level of driving the external load, so that the inverter INV
2
of the output stage
3
has more driving power than the inverter INV
1
of the oscillation stage
2
.
FIG. 14
is an example of a circuit FIGURE of the inverter INV
1
at the oscillation stage
2
and the inverter INV
2
at the output stage
3
. As shown in
FIG. 14
, these inverters connect a PMOS transistor and an NMOS transistor in series, and are configured by connecting one end of the PMOS transistor and one end of the NMOS transistor to a power source VDD and a ground GND, respectively, wherein the common gate of the PMOS transistor and the NMOS transistor is input G and the node is output D.
When power is input to the piezoelectric oscillator
1
, through-current which is proportional to the driving power of each inverter instantaneously flows to the inverter INV
1
at the oscillation stage
2
and the inverter INV
2
at the output stage
3
.
SUMMARY OF THE INVENTION
As mentioned above, the inverter INV
2
at the output stage
3
has more driving power, so that the through-current that flows to the inverter INV
2
at the output stage
3
, is large, generating noise during the power supply process.
Subsequently, power noise by the inverter INV
2
at the output stage
3
prevents the inverter INV
1
at the oscillation stage
2
, which has lower driving power so as to reduce spurious modes of oscillation pulses P, from stably starting, thereby resulting in the abnormal oscillation and non-oscillation of the oscillation stage
2
.
Thus, it is an object of the present invention to at least provide a piezoelectric oscillator which can lower noise during the power supply process so as to stabilize the starting properties and to improve oscillation stability, and an electric device having this piezoelectric oscillator.
A piezoelectric oscillator according to an exemplary embodiment of this invention has an oscillation stage to generate oscillation pulses by exciting a piezoelectric resonator, an output stage to amplify and then output the oscillation pulses, and a start delaying circuit having a plurality of delay times so as to start the output stage from the oscillation stage later than the oscillation stage by a delay time selected from a plurality of delay times.
In the piezoelectric oscillator according to another exemplary embodiment of this invention, the start delaying circuit has a selection circuit so as to select a predetermined delay time from the plurality of delay times based on pre-set information, a delaying circuit to gradually raise start signals in response to the selected delay time and then output the signals, and a starting circuit to start the output stage in response to the value of the start signals.
In the piezoelectric oscillator according another exemplary embodiment of this invention, the start delaying circuit has a selection circuit so as to select a corresponding delay time from a plurality of delay times based on pre-set information, and a delaying circuit to gradually raise start signals in response to the selected delay time and then output the signals. The output stage starts in response to the value of the start signals.
In the piezoelectric oscillator according to another exemplary embodiment of this invention, the delaying circuit has a resistance element, a plurality of capacitance elements, and a plurality of switching devices connected to the plurality of capacitance elements, respectively. The selection circuit sets the time constants of the delaying circuit to the selected corresponding delay time by controlling the plurality of switching devices based on the set information.
In the piezoelectric oscillator according to another exemplary embodiment of this invention, the delaying circuit has a capacitance element, a plurality of resistance elements, and a plurality of switching devices connected to the plurality of resistance elements, respectively. The selection circuit sets the time constants of the delaying circuit to the selected corresponding delay time by controlling the plurality of switching devices based on the set information.
In the piezoelectric oscillator according to another exemplary embodiment of this invention, the switching devices are transistors and the resistance elements are the ON resistance of the transistors.
In the piezoelectric oscillator according another exemplary embodiment of this invention, the start delaying circuit has a selection circuit so as to select a predetermined delay time from the plurality of delay times based on pre-set information, a delaying circuit to output start signals after the passage of the selected delay time as the oscillation stage is started, and a starting circuit to start the output stage in response to the value of the start signals.
In the piezoelectric oscillator according to another exemplary embodiment of this invention, the start delaying circuit has a selection circuit so as to select a predetermined delay time among the plurality of delay times based on pre-set information, and a delaying circuit to output start signals after the passage of the selected delay time as the oscillation stage is started. The output stage starts in response to the value of the start signals.
In the piezoelectric oscillator according to another exemplary embodiment of this invention, the delaying circuit has an oscillation circuit to generate oscillation pulses for setting the delay time, and a counter to count the oscillation pulses for setting the delay time and switch signal levels of the start signals as a counted number reaches a pre-set value. The selection circuit sets the value of the counter to a value corresponding to the selected delay time based on the set information.
In the piezoelectric oscillator according to another exemplary embodiment of this invention, the oscillation circuit is the oscillation stage.
In the piezoelectric oscillator according to another exemplary embodiment of this invention, the output stage is configured by connecting a plurality of clocked gates in rows. The starting circuit starts the output stage by operating predetermined clocked gates among the plurality of clocked gates based on set information, which was pre-set, in response to the value of the start signals.
In the piezoelectric oscillator according
Endo Takashi
Fujii Yoichi
Kinkead Arnold
Oliff & Berridg,e PLC
Seiko Epson Corporation
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