Piecewise linear digital to analog conversion

Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion

Reexamination Certificate

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Details

C341S153000, C341S154000

Reexamination Certificate

active

06445325

ABSTRACT:

TECHNICAL FIELD
The present invention relates generally to electrical circuits and, more particularly, to piecewise linear digital to analog conversion.
BACKGROUND OF THE INVENTION
A digital-to-analog converter (DAC) converts a digital input, which can include one or more bits of data, into an analog output signal functionally related to the digital input data. A DAC is typically implemented in an integrated circuit or chip, although it can be implemented on a circuit board by an appropriate arrangement of components. DACs further can be utilized in a variety of applications, such as instrumentation applications, level detection applications, drivers for LCD screens, servo tracking, and communications applications.
A common type of DAC is a linear DAC that generates an analog output signal that varies linearly with respect to the value of the digital input signal. By way of example, a weighted-resistor DAC includes a network of resistors connected to a summing node. The bits of the input digital signal are connected to corresponding switches, such as transistors. Each switch connects one of the resistors into the network if the corresponding bit is HIGH and disconnects the resistor from the network if the corresponding bit is LOW. The resulting resistor has a value that is weighted according to the position of the bit. The summing node sums the collective currents contributed by the resistors that are switched into the network, thereby producing a current functionally related to the digital input. The output current can be provided to a suitable amplifier to convert the current into a voltage output.
An R-2R ladder DAC is a variation of the weighted-resistor DAC. The R-2R ladder DAC has a resistor network configured to minimize the range of resistor values. The R-2R DAC can include first and second stages of resistor strings coupled together via a first switching network. A reference voltage potential is coupled across the first stage resistor string. A switching network (e.g., a multiplexer) operates to couple a voltage produced at a selected node in the first resistor string across the second stage resistor string. A second switching network couples an output at a selected one of the resistors in the second resistor string to an output of the DAC. Buffer amplifiers also can be provided to convert the output of the second switching network to a corresponding voltage signal.
Similar types of DACs are known that use a capacitor network rather than a resistor network. A related type of DAC, known as a binary-weighted current sink DAC, includes weighted current sources rather than weighted resistors.
SUMMARY OF THE INVENTION
The following presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not an extensive overview of the invention. It is intended to neither identify key or critical elements of the invention nor delineate the scope of the invention. Its sole purpose is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
One aspect of the present invention provides a digital to analog converter (DAC) that includes a network of impedance components having a plurality of nodes having associated voltages. A tap is coupled to an associated one of the plurality of nodes to source or sink electrical current relative to the associated node. A switching system is operative to couple a selected one of the nodes to an output according to a digital input word, such as to provide an analog voltage corresponding to the digital input.
In a particular aspect of the present invention, a plurality of taps (e.g., resistive taps) can be connected at different breakpoint nodes so as to provide desired breakpoint voltages at such nodes. For example, if the network of impedance components are arranged to provide segments of evenly spaced voltages between breakpoint nodes, desired transfer characteristics can be approximated by appropriate selection of the breakpoint voltages.
Another aspect of the present invention provides a method for making a DAC. The method includes determining desired transfer characteristics of the DAC and determining a number of breakpoints for approximating the desired transfer characteristics, such as with piecewise linear segments between such breakpoints. Breakpoint voltages can then be determined for each of the breakpoints so as to implement the desired transfer characteristics, which can be monotonic or non-monotonic.
Still another aspect of the present invention provides a method for testing operating characteristics of a DAC that includes a switch operative to connect an intermediate node of the DAC with high voltage potential. The method includes activating the switch and supplying the high voltage at the test node. Digital input words are supplied to the DAC up to a word having a value associated with the test node. An output voltage of the DAC is measured in response to the application of digital words. The measurements provide an indication of the performance of the DAC.
The following description and the annexed drawings set forth in certain illustrative aspects of the invention. These aspects are indicative, however, of a few ways in which the principles of the invention may be employed. Other advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.


REFERENCES:
patent: 4641131 (1987-02-01), Demmer
patent: 5111205 (1992-05-01), Morlon
patent: 5160930 (1992-11-01), Hosotani et al.
patent: 5739782 (1998-04-01), Uda
patent: 5764174 (1998-06-01), Dempsey et al.
patent: 5828330 (1998-10-01), Benzel
patent: 5841384 (1998-11-01), Herman et al.
patent: 6133863 (2000-10-01), Peng
patent: 6157335 (2000-12-01), Suzuki et al.
patent: 6204785 (2001-03-01), Fattaruso et al.

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