Motion video signal processing for recording or reproducing – Local trick play processing – With randomly accessible medium
Reexamination Certificate
1999-08-23
2002-01-15
Boccio, Vincent F. (Department: 2615)
Motion video signal processing for recording or reproducing
Local trick play processing
With randomly accessible medium
C386S349000, C386S349000
Reexamination Certificate
active
06339669
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a picture-reproducing apparatus and particularly, to the picture-reproducing apparatus which reproduces a moving picture from picture codes recorded on a record medium and has an automatic pause function.
2. Description of the Prior Art
Heretofore, technologies for effectively compressing a moving picture or a still picture in digital has been standardized.
FIG. 12
shows a relationship between a sequence of decoding a moving picture from picture codes complying with MPEG-1 standard (ISO/IEC-11172) and a sequence of displaying the moving picture. In
FIG. 1
, I frame (intra picture) is decoded from only picture codes in the I frame itself. P frame (predictive picture) is reproduced from picture data in a preceding I frame if necessary and picture codes in the P frame itself. B frame (bidirectionally predictive picture) is reproduced from picture data in a preceding I frame or P frame if necessary, picture data in succeeding I frame or P frame if necessary, and picture codes in the B frame itself. P
4
frame is reproduced from picture data in I
1
frame if necessary and picture codes in P
4
frame. B
2
and B
3
frames are reproduced from picture data in I
1
frame if necessary, picture data in P
4
frame if necessary, and picture codes in B
2
and B
3
frames, respectively. The display sequence has a order of I
1
, B
2
, B
3
, P
4
, and so forth. However, because frames B
2
and B
3
must be decoded using already decoded frame P
4
, frame P
4
need to be decoded before frames B
2
and B
3
. Therefore, the decode sequence must has a order of I
1
, P
4
, B
2
, B
3
, and so forth.
FIG. 13
is a diagram showing a relationship between a variation of the amount of picture codes in a buffer and frame types. According to the MPEG standard, compression method varies among frame types. Therefore, there is a tendency that an I frame which is decoded from picture codes in the I frame itself heavily consumes codes, whereas a B frame which is reproduced while using picture data of preceding I or P frame if necessary, picture data of a succeeding I or P frame if necessary lightly consumes picture codes. In order to simultaneously read picture codes from a recording media at a constant rate and execute a moving picture-decoding process in which the amount of consumed picture codes varies dependently on picture type, there is desired a picture code buffer which never overflows nor underflows. In addition, according to the MPEG standard, the amount of picture codes which should be stored in a picture code buffer at the time when the decoding of the first frame begins is described in “vbv delay ” in a picture layer as shown in FIG.
10
. Decoder needs to start decoding at the time when a picture code buffer has stored the amount of picture codes designated by “vbv delay” to prevent such phenomenon in which the picture code buffer underflows, the decoding operation of the decoder is halted, and the temporal continuity of the displayed picture breaks.
Among standards by which moving picture data are compressed in conformity with the MPEG standard or the CDROM-XA (Compact Disc Read Only Memory Extended Architecture) standard and then recorded on a compact disc having a sector structure is the Video CD standard. In the Video CD standard, there is provided an automatic pause function. In accordance with the automatic pause function, once a frame including a sector whose trigger bit for the automatic pause function (hereinafter referred to as “an automatic pause trigger bit”) is active is decoded and displayed, the frame will be kept displayed in a freeze mode until the pause is released. In accordance with the structure of a sector defined by CDROM-XA Forum
2
as shown in
FIG. 14
, the automatic pause trigger bit is recorded in an automatic pause trigger bit area of Submode area of the sub header of a sector, and picture codes are grouped into sectors and recorded in a plurality of User Data areas.
As a prior art reference, JPA 07-226903 discloses an apparatus for realizing the automatic pause function.
FIG. 11
is a block diagram of the conventional picture-reproducing apparatus in the prior art reference. Referring to
FIG. 11
, the conventional picture-reproducing apparatus comprises: read-in circuit
32
which reads picture codes in User Data areas from recording media
31
, which has a Submode area and User Data area in a structured sector, and writes the picture codes to buffer circuit
33
; buffer circuit
33
which temporally stores the picture codes written by read-in circuit
32
and outputs the stored picture codes to decoder
34
; decoder
34
which decodes picture data from the picture codes inputted from buffer circuit
33
and outputs the picture data to display circuit
35
; and display circuit
35
which displays the picture data inputted from decoder
34
.
The picture codes which are necessary to decode a single frame are recorded in the User data areas of a plurality of sectors dividedly. If there is a frame which is desired to be displayed in a freeze mode by automatic pause function, an active automatic pause trigger bit is recorded in a Submode of the last sector for the frame.
Next, the operation of read-in circuit
32
is explained hereunder with reference to FIG.
15
.
At the beginning, read-in circuit
32
reads a Submode area at step S
1501
. Thereafter, read-in circuit
32
reads picture codes in a User Data area at step S
1502
and writes the picture codes to buffer circuit
33
at step S
1503
. Thereafter, read-in circuit
32
judges whether or not all the picture codes in a User Data area of one sector has been read at step S
1504
. If the result of the judgement is negative, the operation returns to step S
1502
, whereas if the result of the judgement is affirmative, the operation advances to step S
1505
. Therefore, operations at Steps
1502
and
1503
are repeated until all the picture codes in a User data area of one sector has been read. Thereafter, read-in circuit
32
judges whether or not the automatic pause trigger bit in the Submode area read at step S
1501
is active at step S
1501
. If the result of the judgement at step S
1505
is negative, the operation returns to step S
1501
to read the next sector, whereas if the result of the judgement at step S
1505
is affirmative, the operation finishes and the next sector will not be read.
Next, the operation of buffer circuit
33
is explained hereunder with reference to FIG.
16
.
As explained above, the picture codes are sequentially written to buffer circuit
33
by read-in circuit
32
. Buffer circuit
33
judges whether or not decoding one frame is executable, that is, all the picture codes for one frame has stored in buffer circuit
33
at step S
1601
. If the result of the judgement at step S
1601
is affirmative, the operation advances to step S
1602
, whereas if the result of the judgement at step S
1601
is negative, the operation halts and buffer circuit
33
resumes the operation from step S
1601
after a lapse of a predetermined time. After the operation has advanced to step S
1602
, buffer circuit
33
repeats to outputs the picture codes in one frame to decoder
34
until all the picture codes in the frame has outputted to decoder
34
at step S
1602
and S
1603
. After exiting the loop of step S
1602
and S
1603
, the operation returns to step S
1601
.
Next, the operation of decoder
34
is explained hereunder with reference to FIG.
17
.
When picture codes are inputted from buffer circuit
33
, decoder
34
decodes one frame from the picture codes at steps S
1701
through S
1703
. In addition, if there is a decoded frame which is displayable in accordance with the display sequence, decoder
34
outputs the picture data of the decoded frame to display circuit
35
.
Display circuit
35
displays picture data of decoded frames which have been inputted from decoder
34
. If the input of picture data from decoder
34
is halted, display circuit
35
continues to display the picture data of the last frame before
Boccio Vincent F.
Whitham Curtis & Christofferson, P.C.
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