Picture memory mapping to minimize memory bandwidth in compressi

Computer graphics processing and selective visual display system – Computer graphic processing system – Integrated circuit

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345507, 348716, G06F 1206

Patent

active

060286121

ABSTRACT:
A method of a storing a picture in a memory such that bandwidth can be reduced when retrieving an array portion of the picture from the memory, and a memory architecture are disclosed. The memory is subdivided into a plurality of words for storing a picture having rows and columns. The picture is partitioned into two or more stripes each having a predetermined number of columns. The number of bytes in one row of one stripe is equal to the number of bytes in one word, for storing the data in one row of a stripe in one word. For the case of progressive video sequences or images the memory is organized in frame structure. For the case of interlaced video sequences or images, the memory is organized in field structure. For a frame picture to be stored in a frame organized memory or a field picture to be stored in a field organized memory, the data in the first row of one of the stripes is stored in a first word. The data in each subsequent row of the stripe is stored in a word having a word address adjacent and subsequent to the word storing the data of the directly preceding row. For a frame picture to be stored in a field organized memory, the odd rows are stored together according the above mapping scheme in a first memory buffer, and the even rows are stored together according to the above mapping scheme in a second memory buffer.

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