Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1998-11-16
2003-09-30
Hjerpe, Richard (Department: 2674)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S096000, C345S209000
Reexamination Certificate
active
06628253
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a driving method suitable for an active matrix type display which uses a display medium such as a liquid crystal and has a built-in driving circuit, and particularly to an alternating drive method of a liquid crystal panel.
2. Description of the Related Art
FIG. 7
is a block diagram of a conventional liquid crystal display device.
A liquid crystal panel
1
includes a plurality of scanning lines
2
extending in parallel with each other in the horizontal direction, a plurality of signal lines
3
extending in parallel with each other in the vertical direction intersecting the scanning lines at right angles, TFTs (thin film transistors) disposed near the intersecting portions of the scanning lines and the signal lines, and pixel electrodes connected to the TFTs. One end of each of the scanning lines
2
is connected to a gate electrode of each of the TFTs and the other end thereof is connected to a gate driver circuit
4
(scanning line drive circuit). One end of each of the signal lines
3
is connected to a source electrode of each of the TFTs and the other end thereof is connected to a source driver circuit
5
(signal line drive circuit).
A video signal from a signal processing circuit
6
, and a start pulse signal, a clock signal, a horizontal synchronizing signal, etc. from a control circuit
7
are inputted to the source driver circuit
5
.
The signal processing circuit
6
includes an analog/digital (A/D) conversion circuit
14
, a correcting circuit
8
, a digital/analog (D/A) conversion circuit
9
, a reversal process circuit
10
, and the like.
The control circuit
7
is a circuit for forming, on the basis of a video signal, pulses (start pulse, clock pulse, synchronizing signal, polarity reversal signal, etc.) necessary for the gate driver circuit
4
, the source driver circuit
5
, the signal processing circuit
6
, and the like and for outputting the pulses.
The operation of the conventional liquid crystal display device structured as described above will be described.
First, while using an inputted synchronizing signal as a reference, the control circuit
7
repeats an operation (frequency division) of counting a predetermined count number (frequency division ratio) of clocks, with an oscillation clock signal (OSC) outputted from a phase synchronized oscillator as a basic oscillation. The control circuit
7
counts the clocks at the same time as the frequency division, and forms a start pulse
23
(SPD) in the screen horizontal direction, a start pulse
24
(SPS) in the screen vertical direction, a clock pulse
25
(CLD) in the screen horizontal direction, a clock pulse
26
(CLS) in the screen vertical direction, and a polarity reversal signal
22
(FRP). There is also a case where a horizontal synchronizing signal (HYS) and a vertical synchronizing signal (VSY) are formed. In this case, the HSY and the VSY are used as references in the horizontal and vertical directions when, for example, characters are displayed on the screen.
An input video signal
20
includes such signals that picture signals of one screen (frame) are divided by the number of lines in the longitudinal direction (vertical direction), and the signals the number of which is equal to the number of lines in the longitudinal direction are continuous. Data in one pixel unit, that is, respective data of red (R), green (G), and blue (B) are made one set and are transmitted every unit time to an input video signal line.
Correspondingly to the input video signal
20
, in a pixel region
11
, pixels of R, G, and B corresponding to different three colors of red, green, and blue are sequentially repeatedly arranged in the lateral direction (horizontal direction) of the panel to make up a pixel row, and a pixel column is made up in the longitudinal direction (vertical direction). For example, if the pixel region
11
is made up of 640 pixels in the horizontal and 400 pixels in the vertical, a video signal of one screen includes such signals that lines in the horizontal direction, each including information signals of 640 pixels in the horizontal, are continuous by the number (400 columns) of lines in the vertical direction. In general, the input video signal is a signal corresponding to a CRT, and is not a signal suitable for liquid crystal panel display, so that it is necessary to carry out various signal processes.
In the signal processing circuit
6
, a &ggr; correcting process in view of liquid crystal characteristics, an analog/digital signal (A/D) converting process, a digital/analog signal (D/A) converting process, an alternating process to improve the reliability of liquid crystal, and the like are performed to the input video signal from an external device.
In this signal processing circuit
6
, for the purpose of obtaining excellent display, various corrections are carried out to the input video signal inputted from the outside. For the corrections, analog RGB signals are first converted into digital RGB signals by the analog/digital signal (A/D) conversion circuit
14
. The &ggr; correcting process in view of the liquid crystal characteristics and the like are performed to the video signal converted into digital signals and corrections are made. The corrected video signals are again converted into analog RGB signals by the digital/analog signal (D/A) conversion circuit
9
.
Next, by the reversal process circuit
10
, the video signals are subjected to the alternating process and the like to improve the reliability of liquid crystal. A polarity reversal signal
22
(FRP) as a signal to determine the timing for carrying out polarity reversal necessary for driving the liquid crystal panel is inputted to the reversal process circuit
10
from the control circuit
7
. The reversal process circuit
10
is a circuit for inverting the video signal in accordance with the polarity reversal signal
22
(FRP).
In this way, the signal processing circuit
6
processes the input video signal
20
into an analog video signal
27
suitable for display of the liquid crystal panel. This video signal (subjected to the &ggr; correction, alternating process, and the like) is inputted to the liquid crystal panel
1
.
Next, this video signal
27
, the SPD
23
formed in the control circuit
7
, and the CLD
25
are inputted to the source driver circuit
5
provided in the liquid crystal panel
1
. The SPD
23
is a signal regulating the timing in one horizontal period when display is started. The CLD
25
is a signal corresponding to the respective pixels in the horizontal direction, and in accordance with this signal, the source driver circuit samples the video signal from the signal processing circuit and outputs a voltage (video signal) corresponding to the respective pixels to the signal line
3
.
FIG. 9
is a timing chart in the source driver circuit.
The SPS
24
and the CLS
26
formed in the control circuit
7
are inputted to the gate driver circuit
4
. The SPS
24
is a signal regulating the timing in one vertical period when display is started. The CLS
26
is a signal corresponding to the respective pixels in the vertical direction, and it is designed such that in accordance with this signal, scanning is carried out every one horizontal period from the upper portion of the screen and the screen is displayed.
The design of displaying the screen will be described in detail with reference to
FIGS. 8A and 8B
.
First, in accordance with a signal from a shift register, with respect to the signal line (
1
), only one portion (pixel A
1
) of a lateral direction (horizontal direction) line of the video signal
27
is selected and sampled, and its potential is applied to the entire of the signal line (
1
). A signal voltage (turning on a TFT provided in the vicinity of an intersecting portion) is applied to only a scanning line A. Then, only the TFT provided in the vicinity of the intersecting portion of the signal line (
1
) and the scanning line A is turned on and the potential of the signal line (
1
) is applied to the pix
Hjerpe Richard
Nguyen Francis
Robinson Eric J.
Robinson Intellectual Property Law Office P.C.
Semiconductor Energy Laboratory Co,. Ltd.
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