Picture compression circuit

Image analysis – Image compression or coding – Predictive coding

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382250, G06K 900

Patent

active

057684332

ABSTRACT:
A picture compression circuit includes a video memory and an encoding unit connected to the video memory in order to read a picture by macroblocks to subject these macroblocks to a discrete cosine transform, a quantification and a variable length coding, and to read in the memory predictor macroblocks of another picture and to subtract these predictor macroblocks from the currently processed macroblocks. A motion estimation unit can be connected to the video bus and to the encoding unit, to receive through the video bus a macroblock currently processed and a search window, in order to search in the window for a predictor macroblock. The difference of position between the predictor macroblock and the currently processed macroblock is provided as a motion estimation vector to the encoding unit.

REFERENCES:
patent: 5122875 (1992-06-01), Raychaudhuri et al.
patent: 5185819 (1993-02-01), Ng et al.
patent: 5227878 (1993-07-01), Puri et al.
patent: 5267037 (1993-11-01), Sugiyama
Elektronik, vol. 41, No. 9, Nov. 1992, Munchen, DE, pp. 72-75, XP320229, M. Querol "MPEG/H261-Videodecoder Mit Wenigen Chips".
Electronics Engineering, vol. 6, No. 790, Oct. 1992, Woolwich, GB, pp. 77-82, XP320428 "Technology Focus: System Solutions For MPEG Imaging".
Electrical Design News, vol. 37, No. 15, Jul. 20, 1992, Newton, MA, p. 71, XP307545, G. Legg "MPEG Video-Decoder Chips Target Low-Cost Applications".

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