Picture coding and decoding apparatus using vector quantization

Details Picture coding and decoding apparatus using vector quantization Picture coding and decoding apparatus using vector quantization

1989-04-07

1991-04-23

Peng, John K.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358105, 358133, 358135, H04N 712, H04N 718

Patent

active

050104012

DESCRIPTION:

BRIEF SUMMARY
TECHNICAL FIELD

The present invention relates to an image encoding and decoding apparatus used in a video teleconference, a video telephone or the like.


BACKGROUND ART

FIG. 1 is a block diagram illustrating constitution of an encoding section in an interframe block encoding and decoding apparatus in the prior art where adaptive vector quantization is used as a method of block encoding. In FIG. 1, numeral 1 designates an A/D converter, numeral 2 designates a switch for performing a time lapse of input video signal series, numeral 3 designates a raster/block scan converting circuit where digital video signal series in raster form is blocked into blocks, each of m pixels by n lines (m, n: positive integers) to form input block data, numeral 4 designates a subtractor which obtains a differential signal between the input block data and block data within the frame memory at the same position on the frame as the input block data, i.e., frame-to-frame differential block data, numeral 5 designates a mean value separation normalizing circuit which calculates a mean value and an amplitude component of the interframe differential block data in units of block and obtains a normalized input vector through the normalizing processing, numeral 6 designates a motion estimation circuit which executes motion estimation in block units using the mean value, the amplitude component and a threshold value, and outputs the motion information, numeral 7 designates a vector quantization encoder which performs vector quantization of the normalized input vector and converts it into a normalized output vector index, numeral 8 designates a transmission data buffer which performs variable word length encoding on each of the motion information, the mean value, the amplitude component and the normalized output vector index, and stores the encoded data for a definite period to transmit to a transmission line at a definite speed, numeral 9 designates an encoding control circuit which controls the input time valve and the motion estimation threshold value in response to the amount of the information stored in the transmission data buffer, numeral 10 designates a vector quantization decoder which performs decoding to reproduce the interframe differential block data from the motion information, the mean value, the amplitude component and the normalized output vector index, numeral 11 designates an adder which reproduces the input block data, numeral 12 designates a variable delay circuit, and numeral 13 designates a frame memory.
Also FIG. 2 is a block diagram illustrating the constitution of a decoding section in the interframe block encoding and decoding apparatus in the prior art where adaptive vector quantization is used in similar manner to the encoding section. In FIG. 2, numeral 14 designates a reception data buffer which receives encoded data supplied from the transmission line, stores it for a definite period while performing variable length decoding, and outputs the stored data at a speed corresponding to the decoding operation, numeral 15 designates a block/raster scan converting circuit which converts the input block data being decoded and reproduced into a raster form, and numeral 16 designates a D/A converter.
Next, the encoding and decoding operation will be described using FIGS. 1 and 2. In the decoding section, an input moving picture signal 201 is an analog signal which is raster-scanned from the left to the right and from the upper side to the lower side of the frame. The analog signal is converted into digital signal series 202 by the A/D converter 1, and then blocked into blocks of m pixels by n lines each (m, n: positive integers) in the raster/block scan converting circuit 3, thereby input block data S 203 can be obtained. Block P 204 at the same block position within the frame memory 13 is subtracted from the block data S 203, and interframe differential block data .epsilon. 205 obtained in this manner is supplied to the mean value separation normalizing circuit 5. In the mean value separation normalizing circuit 5, t

REFERENCES:
patent: 4809067 (1989-02-01), Kikuchi et al.
patent: 4933761 (1990-06-01), Murakami et al.
patent: 4933762 (1990-06-01), Guichard et al.

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