Picket autonomy on a SIMD machine

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39580013, 39580014, G06F 1516

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058157239

ABSTRACT:
A parallel array computer provides an array of processor memory elements interconnected for transfer of data and instructions between processor memory elements. Each of the processing elements has a processor coupled with a local memory. An array controller is provided for controlling the operation of the array of processor memory elements. Each of the processor memory elements has a plurality of local autonomous operating modes and is adapted to interpret instructions from the array controller within the processor memory element.

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